Suppose we have a processor with a base CPI of 2.0 assuming all references hit in the pnmary cache and a clock rate of 1000 MHz. The main memory access time is 100 ns. Suppose the miss rate per instruction is 5%. What is the revised CPI? How much taster will the machine run it we put a secondary cache (with 20-ns access time) that reduces the miss rate to memory to 2%

Suppose we have a processor with a base CPI of 2.0 assuming all references hit in the pnmary cache and a clock rate of 1000 MHz. The main memory access time is 100 ns. Suppose the miss rate per instruction is 5%. What is the revised CPI? How much taster will the machine run it we put a secondary cache (with 20-ns access time) that reduces the miss rate to memory to 2%

Name: Suppose we have a processor with a base CPI of 2.0 assuming all refere
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Description: Suppose we have a processor with a base CPI of 2.0 assuming all references hit in the pnmary cache and a clock rate of 1000 MHz. The main memory access time is 100 ns. Suppose the miss rate per instruction is 5%. What is the revised CPI? How much tas

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...

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Suppose we have a processor with a base CPI of 1, assuming all references hit in the primary cache, and a clock rate of 2 GHz. Assume a main memory access time of 200 ns, including all miss handling. Suppose the miss rate per instruction at the primary cache is 3%. How much faster will the processor be if we add a secondary cache that has 10 ns access time for either a hit or a miss and is large enough to reduce the miss rate to main memory to 1%?
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Suppose you have a processor with a base CPI 1.0, assuming all references hit in theprimary cache (L1), and a clock rate of 3 GHz. Assume that you have two caches (L1and L2). L2 cache access time is 10 ns and main memory access time is 200 ns,including all the miss handling. Suppose the miss rate per instruction at the L1 cache is10%, L2 cache is 5%.a) What is the effective CPI?b) What will be the effective CPI if we add a new cache (L3) that has 50 nsaccess time and reduce the miss rate to main memory to 1%?
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