The content of registers and memory are summarized as follow: R0=0x24682244 R1=0x00446688 R2=0x00118822 R3=0X00000077 R4=0x4000000C R5=0x00000008 R6=0x00000055 R7=0x40000000 R8=0x40000002 (0x40000000)= 12 84 56 78 90 AB CD EF 11 22 33 44 55 66 77 88 Evaluate the following program and obtain the new content of the registers R0 – R7, and new content of memory starting from address 0x40000000 until 0x4000000F ENTRY MOVS R0,#25 LDRB R1,[R7] LDRH R2,[R7,#0x2] LDR R3,[R7] LDRSB R4,[R7,R5] LDRSH R5,[R8,R5] STR R6,[R7],#4 STRB R7,[R8,#1]! STM R7,{R1,R5-R6} STRH R0,[R8,#5] END

The content of registers and memory are summarized as follow: R0=0x24682244 R1=0x00446688 R2=0x00118822 R3=0X00000077 R4=0x4000000C R5=0x00000008 R6=0x00000055 R7=0x40000000 R8=0x40000002 (0x40000000)= 12 84 56 78 90 AB CD EF 11 22 33 44 55 66 77 88 Evaluate the following program and obtain the new content of the registers R0 – R7, and new content of memory starting from address 0x40000000 until 0x4000000F ENTRY MOVS R0,#25 LDRB R1,[R7] LDRH R2,[R7,#0x2] LDR R3,[R7] LDRSB R4,[R7,R5] LDRSH R5,[R8,R5] STR R6,[R7],#4 STRB R7,[R8,#1]! STM R7,{R1,R5-R6} STRH R0,[R8,#5] END

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...

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If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the fetch cycle is 40% of the processor cycle time, what memory access speed is required to implement load operations with zero wait states and load operations with two wait states?
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A hypothetical machine is given as follows. The partial list of opcodes (bits 0-3) for the machine are as follows. 0001 = Load AC from Memory 0010 = Store AC to Memory 0011 = Add to AC from Memory 0100 = Load AC from I/O 0101 = Store AC to I/O 0110 = Load Register from Memory 0111 = Store Register to Memory 1000 = Add to AC from Register The list of registers (bits 4-5) for the machine are as follows. 00 Register 1 01 Register 2 10 Register 3 11 Register 4 In the following cases, the remaining 10 bits identify a particular I/O device or memory location. Show the program execution (contents of IR, PC, AC) for the following program where the following instructions are executed from memory locations 300, 301, 302, 303, and 304 respectively. 1.Load Register 1 from Device 5. Assume that the next value retrieved from device 5 is 30 2.Add content of Register 2. (Assume that Register 2 contains a value of 20.) 3.Store AC to device 6.
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Suppose r0 = ox300010A0, r2 = 0x00000011, and the memory layout is as follows Address: Data: 0x300010A7 0x72 0x300010A6 0XA5 0x300010A5 0x9F 0x300010A4 0x00 0x300010A3 0x50 0x300010A2 0x2B 0x300010A1 0XA5 0x300010A0 0x01 -What is the Value of r0 and r1 after executing LDR r1, [r0, #2] -What are the values of r0 and r1 after executing the following code? Illustrate your process in a memory map. LDR r1, [r0], #3 ADD r1, r1, r2 STR r1, [r0, r#4]
Suppose r0 = ox300010A0, r2 = 0x00000011, and the memory layout is as follows Address: Data: 0x300010A7 0x72 0x300010A6 0XA5 0x300010A5 0x9F 0x300010A4 0x00 0x300010A3 0x50 0x300010A2 0x2B 0x300010A1 0XA5 0x300010A0 0x01 -What are the values of r0 and r1 after executing the following code? Illustrate your process in a memory map. LDR r1, [r0], #3 ADD r1, r1, r2 STR r1, [r0, r#4]
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3) The 8-bit register AR, BR, CR, and DR initially have the following values: [5]AR = 11010110; BR = 11100111; CR = 10110001; DR = 10111010Determine the 8-bit values in each register after the execution of the following sequenceof microoperations.AR  AR + BR Add BR + ARCR  CR AND DR, BR  BR + 1 AND DR to CR, Increment BRAR AR - CR Subtract CR from AR
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