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- Logic Gates:* 7404LS (NOT)* 7408LS (AND)* 7432LS (OR)* 7400LS (NAND)* 7402LS (NOR)* 7486LS (EX-OR)Or you can use 74HCxx versions. Task 2: 4 INPUT PRIORITY ENCODERa) Write the truth table.b) Find the outputs in terms of min terms using minimal expression.c) By using K map, find the simple/simplest expression of theoutputs.d) Draw the circuit diagram. (Simulation design will be accepted.)e) Simulate the circuit & explain your results. (Please do notdesign separate simulations for each output. You should design ONEsimulation including all inputs and outputs.)In this problem we'll explore the fact that all logical circuits can be implemented using just NAND gates. The figure below shows you the symbol for a NAND gate and its truth table. We then show you how NAND gates can be wired together to perform the equivalent of a NOT gate, an AND gate, and an OR gate. NAND gate AB Output 1 01 1 Inputa Inputg Output 10 1 11 NOT A- AND D B. A. OR B. 2 i. Let's denote p NAND q as pīq. Write a logical expression for the thrce circuits corresponding to AND, OR, and NOT. ii. Validate your three logical expressions with three truth tables. For clarity and full credit, show cach variable and distinct sub-clause in a separate column, culminating in your final formula. 3. 2.Logic Gates:* 7404LS (NOT)* 7408LS (AND)* 7432LS (OR)* 7400LS (NAND)* 7402LS (NOR)* 7486LS (EX-OR)Or you can use 74HCxx versions.Task 1: 2-to-1 LINE MULTIPLEXER DESIGNA) Write the truth table of 2-to-1 line multiplexer.B) Draw the circuit diagram by using only NAND & NOT GATES.C) Simulate the circuit that you found in part B.
- B) Simplify the following Boolean expression, then implement by using NOR gates only. [AB(C+ BD) + ABJCDraw the logic diagram to implement the following Boolean expression using only NAND gates.Y= A’(B+C) +DA2. Using Boolean algebra, reduce the output equation of the function in Table 1. (You can use the “Karnaugh Map of Table 2" to simplify the logic function obtained). CD AB Table 2 00|01|11| 10 00 01 11 A3. Construct the simplified expression obtained in A2 by only NOR gates. Design and draw the NOR gate 10 connection diagram of the simplified function using only one 4001 IC. using
- An equation in reduced SOP form, is F=AB+B'C+A'C'. I need to draw a logic circuit F using NOT/AND/OR and logoc circuit F using all NAND gates. Thank you for the help. I understood the previous types of gates but I am confused on how to draw these circuits.Simplify the given Boolean expression and then draw a logic circuit using NOR Gates. X (A, B, C, D) = AB’C’ + AC + A’CD’Draw the AND and OR gate logic diagram of the expression. X=L[K(K+L)+M] Logic diagram using AND-OR gates Redraw the circuit using positive NOR gates. Logic diagram using positive NOR gates K(SW2) 0 0 0 0 1 1 1 1 INPUTS L (SW3) 00 1 1 0 0 1 1 M(SW4) 0 1 0 1 0 1 0 1
- Determine the truth table for the following logic circuit. Then identify the type of logic gate using Boolean algebra. O +Vcc R23 ER O O/P Q1 Q2 BOUsing a K-Map, simplify the logic function F and construct the circuit using only NAND gates. F(x, y, z) = xz + xyz + yzIf a fault occurs in connections C5 (stuck-at-1) for the following logic circuit, the appropriate fault-test by using Boolean difference technique .......... C1 X1 Cs C2 X2 Cs C6 C10 C9 C7 t0 t2 t3 t1 O