This question is about physical addressability in a system that uses paging. Let's say we have a 32-bit virtual address, with a 4 KB page size. Let's assume that the system we're running upon has a maximum of 1 GB of physical memory. a) How many entries will be there in a single-level page table and inverted page table?
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- Suppose that a machine has 42-bit virtual addresses and 32-bit physical addresses.{a} How much RAM can the machine support (each byte of RAM must be addressable)?{b} What is the largest virtual address space that can be supported for a process?{c} If pages are 2 KB, how many entries must be in a single-level page table?{d} If pages are 2 KB and we have a two-level page table where the first level is indexed by 15-bits, then how many entries does the first-level page table have?{e} With the same setup as part {d}, how many entries are in each second-level page table?{f} What is the advantage of using a two-level page table over single-level page table?A system with simple paged memory management has addresses of B bits and pages of size P KiB. If all memory is pageable, what is the maximum number of items contained in a process's page table? What if K KiB are reserved for the kernel and are not pageable? Also suppose that the page table is organized in 2 levels, so that the page directory (first level) is addressed by D bits. How many bits will be used to address the second level? How many entries will there be, at most, among all the tables of the pages (first and second level) of a process?Consider a computer system with a 64-bit logical address and 32-KB page size. Thesystem supports up to 4096 MB of physical memory. How many entries are there ineach of the following?a. A conventional single-level page table?b. An inverted page table?
- On a simple paging system with 224 bytes of physical memory, 256 pages of logical address space, and a page size of 210 bytes. 1. How many bits are needed to store an entry in the page table (how wide is the page table)? Assume a valid/invalid 1-bit is included in each entry. 2. If the page table is stored in the main memory with 250nsec access time, how long does a paged memory reference take? 3. If the page table is implemented using associative registers that takes 95nsec. and main memory that takes 200nsec, what is the total access time if 75% of all memory references find their entries in the associative registers?Suppose that a machine has 38-bit virtual addresses and 32-bit physical addresses.(a) What is the main advantage of a multilevel page table over a single-level one?(b) With a two-level page table, 16-KB pages, and 4-byte entries, how many bits should be allocated for the top-level page table field and how many for the next-level page table field? Explain.Consider a memory-management system based on paging. The total size of the physical address space 64 MB, Pages of size 4 KB, the Logical address space of 4GB. total number of pages are 16384, total number of frames are 16384 and the number of entries in a page table are 1048576.Now Calculate: a)Size of Page Table b) No of bits in Physical Address c) No of Bits in Logical Address
- Consider a computer which uses virtual addressing with 32 bit addresses and a two level page table. The virtual addresses are split into a 9 bit top level page table field, an 11 bit second level page table field and an offset. How large are the pages and, how many are there in the address space?Consider a paging system with the page table stored in memory.a. If a memory reference takes 400 nanoseconds, how long does a paged memoryreference take?b. If we add TLBs, and 95 percent of all page-table references are found in the TLBs,what is the effective memory reference time? (Assume that finding a page-table entry inthe TLBs takes zero time, if the entry is there.)Consider a logical address space of 256 pages with a 4-KB page size, mapped onto a physical memory of 64 frames. a. How many bits are required in the logical address? b. How many bits are required in the physical address?
- Assume a 32-bit address system that uses a paged virtual memory, with a page size of 2 KB, and a PTE (Page Table Entry) size of 1 B. Answer the following questions, assuming a virtual address 0x00030f40 a. What is the virtual page number (VPN) and the offset in binary for the given virtual address? b. How many virtual pages are there in the system?Suppose the page table for the process currently executing on the processor looks like the following. All numbers are decimal, everything is numbered starting from zero, and all addresses are memory byte addresses. The page size is 1,024 bytes. Virtual page number 0 Valid bit Reference bit Modify bit Page frame number 1 1 0 1 1 7 2 0 0 0 3 1 0 0 2 4 0 0 0 5 1 0 1 0 What physical address, if any, would each of the following virtual addresses correspond to? (Do not try to handle any page faults, if any.) 1,052 2,221 5,499 Edit View Insert 12pt Paragraph Format Tools Table BIU AvA computer with a 32-bit address uses a two-level page table. Virtual addresses are split into a 9-bit top-level page table field, an 11-bit second-level page table field, and an offset. How large are the pages and how many are there in the address space?