What is the largest purely output-queued ATM switch with zero cell loss requirement that we can build if we use10 ns,4byte wide RAM? Assume the input lines are155Mbps. How large can the switch be if the memory can be accessed on a cell-wide basis? If we decide to run the output at only0.4Ntimes the input lines (Nbeing the switch size) using 4 byte wide RAM, how big a switch can we build? What is the penalty paid for this scheme? Answers: (a)19×19 (b)273×273 (c)48×48

What is the largest purely output-queued ATM switch with zero cell loss requirement that we can build if we use10 ns,4byte wide RAM? Assume the input lines are155Mbps. How large can the switch be if the memory can be accessed on a cell-wide basis? If we decide to run the output at only0.4Ntimes the input lines (Nbeing the switch size) using 4 byte wide RAM, how big a switch can we build? What is the penalty paid for this scheme? Answers: (a)19×19 (b)273×273 (c)48×48

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter6: System Integration And Performance

Section: Chapter Questions

Problem 12RQ

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