1. Given the Load Line & Transistor Characteristic Curve below, Design a Fixed Bias Circuit. Compute for Vcc, RB, and Rc. Consider VBE = 0.7 volts. DC Load Line Saturation Ic Region (mA) Active Region Is= 120uA A 70 Ie= 100UA 60 Is 80UA 50 Q-point Ig = 60UA 40 30 Ig= 40UA 20 Ig= 20uA 10 B Cư df Regon Ig 0 VCE (V) 2 10 12

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1. Given the Load Line & Transistor
Characteristic Curve below, Design a Fixed
Bias Circuit. Compute for Vcc, RB, and Rc.
Consider VBE = 0.7 volts.
DC Load
Saturation
Line
Region
Ic
(mA)
Active Region
Ie = 120UA
70
Ig = 100UA
60
Ig = 80UA
50
Q-point
Ig = 60UA
40
30
Ig = 40UA
20
Ig= 20UA
10
Ig 0
Cu-df Regon
VcE (V)
4.
8
10
12
Transcribed Image Text:1. Given the Load Line & Transistor Characteristic Curve below, Design a Fixed Bias Circuit. Compute for Vcc, RB, and Rc. Consider VBE = 0.7 volts. DC Load Saturation Line Region Ic (mA) Active Region Ie = 120UA 70 Ig = 100UA 60 Ig = 80UA 50 Q-point Ig = 60UA 40 30 Ig = 40UA 20 Ig= 20UA 10 Ig 0 Cu-df Regon VcE (V) 4. 8 10 12
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