1.How could you reset an 8-bit serial in-serial out shift register? 2.A binary number is shifted 4 positions to the left. What is the number
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1.How could you reset an 8-bit serial in-serial out shift register?
2.A binary number is shifted 4 positions to the left. What is the number?
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- An eight bit number, 01011101, is: 1)added to 4 2) subtracted from -10 3) ANDED with 15 a) What is the outcome of these operations in binary? b) What is this number in decimal? c) What is the original number in decimal?Convert decimal number 54.3125 to fixed point binary notation. How many bits are needed? Suppose there are only 8 bits available. What is the numerical error?2. What two principle functions are performed by a shift register? 3. How many clock pulses are required to enter a byte of data serially into an 8-bit shift register?
- 2 (a) Determine the control word ICW2 require for PIC controller so that IRQ0 to IRQ7 correspond to type numbers 30H to 37H , specify the memory location from which the processors will fetch interrupt vectors.Use Digital Logic Simulator Fill-in the blank boxes with the correct LOGIC GATE/ Full/Half AdderWhat are the contents of the file registers WREG, 0x010, 0x020, 0x410, 0x420, after the following program is executed? Assume that all the register contents are initially zero.
- 1.Show the status of PSW (Program status word) after addition of two 8bit numbers 26H and 3FH. Also draw status of flag register with help of diagram? 2. Mention the addressing mode, function and how many bytes instruction for the following instructions? ADI 42H b. LXI H, 2500H c. RLC 3. Write assembly language program to add to 8-bit numbers with carry. First numbers stored on memory location 2500h, second number on 2501H and store 8bit result on memory location 2502H and carry on 2503H.The processor has performed the following addition operation: 0x01A0+ 0xC410------0xC5B0 What decimal numbers did the processor add up, and what is the result of the addition if the programmer chose these numbers to be signed 16-bit number, where the lower four bits represent the fractional part of the number?Subject: Digital Logic Design. Question No. 1: Implementation of 4 variable Karnaugh-Map (SOP), Given logic expression:F (A, B, C, D) = (0,1,2,3, 5,7,8, 9, 11,15,16) Note: Show all steps of calculation and attach screenshot of simulator
- Question 1: a. State the names of the architectures model used in microprocessor and microcontrollers architectures? b. State the multipurpose functions of port 3.0 with the symbol, description and pin configuration in microcontroller? c. Define timer and states the functions of its modes of operations?a) What is the size of ROM? b) What kind of decoder do we need?c) Draw the circuit on paper without any wrong.Design a three bit synchronous binary counter that counts two by two with T-flipflops,continously. Output should be one when the counter equals maximum number.a. Draw the exitation table b. Draw the corresponding state diagram. c. Tabulate the state table for the sequential circuit. d. Draw the logic diagram of the circuit.