4. Suppose we have 1G x 16 RAM chips that make up a 32G x 64 memory that uses high-order interleaving. (This means that each word is 64 bits in size and there are 32G of these words.) a) How many RAM chips are necessary? b) Assuming four chips per bank, how many banks are required? c) How many lines must go to each chip? d) How many bits are needed for a memory address, assuming it is word addressable? e) For the bits in part d, draw a diagram indicating many and which bits are used for chip select, and how many and which bits are used for the address on the chip.

4. Suppose we have 1G x 16 RAM chips that make up a 32G x 64 memory that uses high-order interleaving. (This means that each word is 64 bits in size and there are 32G of these words.) a) How many RAM chips are necessary? b) Assuming four chips per bank, how many banks are required? c) How many lines must go to each chip? d) How many bits are needed for a memory address, assuming it is word addressable? e) For the bits in part d, draw a diagram indicating many and which bits are used for chip select, and how many and which bits are used for the address on the chip.

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter5: Data Storage Technology

Section: Chapter Questions

Problem 2PE

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