A-Calculate the offset address for the following. Assume all numbers in hexadecimal and the first part represent a physical address. 1- 12340:1000 3- ABCD0:0100 2- A2000:12CF 4- FA120:B2C0.
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![A-Calculate the offset address for the following. Assume all numbers in hexadecimal and
the first part represent a physical address.
1- 12340:1000
3- ABCDO:0100
2- A2000:12CF
4- FA120:B2C0.
B-Identify the addressing mode used for the source and destination operands in the
instructions that follows:
1- MOV SI,1111H
3- MOV [BP]+0400H,BX
2- MOV AL,DH
4- MOV [DI],AX](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Feda72790-6b9a-44b1-a98c-8d1d772ad848%2F265f01e0-0680-4db4-9b45-6c4508bc4cfa%2Fid2st2p_processed.jpeg&w=3840&q=75)
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- Will upvote! Suppose that ES= 6DF2, DS=83AC, SS=EBD2, AX=B75, DI=DC7, BP=51A, SI=FB3, REN=75D and YEN=A8E. Determine the address accessed by each of the following instructions and state what addressing mode is used: a. MOV REN[DI][AX][9F], BX b. MOV BL, YEN[BP+SI-72A]1. Name all of the general purpose registers and some of their special functions. 2. How are the segment registers used to form a 20-bit address? 3. (a) If CS contains 03E0H and IP contains 1F20H, from what address is the next instruction fetched? (b) If SS contains 0400H and SP contains 3FFEH, where is the top of the stack located? (c) If a data segment deigns at address 24000H, what is the address of the last location in the segment? 4. Explain what the instruction array and data caches are used for. 5. What is the EU and BIU, and what purpose in the microcomputer? 6. Two memory locations, beginning at address 3000H, contain the bytes 34H and 12H. What is the word stored at location 3000H? See Figure 2.26 for details. Address 3000 Data 34 3001 12 Figure 2.26 For question 6 7. What is a physical address? What are the differences between the 8086 logical and physical memory maps? 8. May memory segments overlap? If so, what is the minimum number of overlapped bytes…Suppose we have a byte-addressable computer using direct mapping with 16-bit main memory addresses and 32 blocks of cache. If each block contains 16 bytes. a. Determine the number of bits of the offset field. b. Determine the number of bits of the block (or slot) field. c. Determine the number of bits of the tag field. d. To which cache block would the hexadecimal address 0x2468 map? e. What is the tag of the hexadecimal address 0x2468 f.To which cache block would the hexadecimal address 0x864A map? g. What is the tag of the hexadecimal address 0x864A?
- Identify the bits that lw, lb, and lh will load from a memory address, assuming that all the load commands are loading the lowest/rightmost set of bits.Assume a 32-bit address system that uses a paged virtual memory, with a page size of 2 KB, and a PTE (Page Table Entry) size of 1 B. Answer the following questions, assuming a virtual address 0x00030f40 a. What is the virtual page number (VPN) and the offset in binary for the given virtual address? b. How many virtual pages are there in the system?Suppose we have a byte-addressable computer using direct mapping with 16-bit main memory addresses and 32 blocks of cache. If each block contains 8 bytes. a. Determine the number of bits of the tag field. b. To which cache block would the hexadecimal address 0x2468 map? c. What is the tag of the hexadecimal address 0x2468
- Suppose a computer system uses 16-bit addresses for both its virtual and physical addresses. In addition, assume each page (and frame) has size 256 bytes. 8 bits are used for offset, 8 bits are used for page # and the max number of pages a process can have is 256. e. Translate the following virtual addresses to physical addresses, and show how you obtain the answers. (Hint: You do not need to convert hexadecimal numbers to decimal ones.) 0x0389 0xDF78 0x0245 0x8012 f) Now, suppose that the OS uses a two-level page table. Draw the page table. (Assume that frames 7 through 221 are free, so you can allocate space for the page table there.) In addition, suppose that the page-table directory storage comprises a whole number of consecutive full frames. (For examples: if the directory entry is 2 bytes, the entry’s storage comprises 1 frame; if the directory entry is 260 bytes, the entry’s storage comprises 2 consecutive frames.) g)What is the size of the two-level page table…Suppose a specific MCU has the following size of memories: 2 M byte of flash, starting from 0x0800_0000, 256 k byte of SRAM starting from 0x2000_0000, and 8 k byte registers for GPIOs, start at 0x4001_0000. (Note that 0x is the prefix for hexadecimal numbers.) Draw the memory map based on your calculations for the addresses.This question is on Computer Architecture. Translate the following arithmetic and logical expressions written in C programming language intoinstructions sequences written in MIPS Assembly language. You may assume that the values (orbase addresses) of the variables a, b, c, and d are in the general-purpose registers $s0, $s1,$s2, and $s3. 1. d[3] = a - b + c[7];2. c[5] = (a << 3) & (b >> 2);Here, <<, >>, and & indicate the bitwise left-shift, right-shift, and AND operations respectively.
- 1.What is the difference between bit address 7CH and byte address7CH? What is the specific location of bit address 7CH in memory?3. The table below represents five lines from a cache that uses fully associative mapping with a block size of 8. Identify the address of the shaded data, 0xE6, first in binary and then in hexadecimal. The tag numbers and word id bits are in binary, but the content of the cache (the data) is in hexadecimal. Word id bits Tag 000 001 010 011 100 101 110 111 ------------------------------------------ 1011010 10 65 BA 0F C4 19 6E C3 1100101 21 76 CB 80 D5 2A 7F B5 0011011 32 87 DC 91 E6 3B F0 A6 1100000 43 98 ED A2 F7 4C E1 97 1111100 54 9A FE B3 08 5D D2 88Let's pretend for a moment that we have a byte-addressable computer with 16-bit main memory addresses and 32-bit cache memory blocks, and that it employs two-way set associative mapping. Knowing that each block has eight bytes, please calculate the size of the offset field and provide evidence of your calculations.