Consider the following assumptions: Size of virtual address: 64 bits Size of physical address: 40 bits Page size: 4 KB Size of meta data per page table entry: 8 bits What is the size of the page table for this system?
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- Question options: Assume the following situation: Pages are 8k Virtual addresses are 24 bits Physical addresses are 32 bits How many bits of the virtual address are the offset? How many bits of the physical address are the offset? In the page table for each process, what's the number of rows (in k, where 1k = 1024)?Assume the page table only needs to map to the physical page number plus it needs 5 bits of additional information per entry. How many columns are there in the page table in bits (i.e., how wide is it, that is the number of bits of physical page + the extra bits above)?Suppose you have a byte-addressable virtual address memory system with 16 virtual pages of 64 bytes each and 4-page frames. Assuming the following page table, answer the questions below: Page # Frame # Valid bit 0 2 1 1 3 1 2 - 0 3 0 0 4 1 1 5 - 0 6 - 0 7 - 0 a) Show the virtual address format, including the name and size of the fields. b) Show the physical address format, including the name and size of the fields. c) What physical address corresponds to the virtual address 0x00? Answer should be in hexadecimal number. (if the address causes a page fault, answer as "page fault" with the proper explanation) d) What physical address corresponds to the virtual address 0x42? Answer should be in hexadecimal number. (if the address causes a page fault, answer as "page fault" with the proper explanation) e) What physical address corresponds to the virtual address 0x72? Answer should be in hexadecimal number. (if the address causes a page fault, answer as "page…Consider a system with 256Mbytes of main memory with page size of 4Kbytes. It has a logical address space of 26-bits. Answer the following questions. (Assume byte-addressable memory) (i) How many of the 26-bits of the logical address represent page# and how many bits represent the offset? (ii) How many entries are there in a conventional single-level page table for a process? (iii) How many entries are there in an inverted page table?
- Assume a 32-bit virtual address and 4 MBs of memory (i.e., DRAM). If the page size is 1 KB, then what is the size of the page table (ignoring any permission or other overhead bits)?For two processes that each have a global variable global_int and share a variable shared_int, draw the virtual address space and the relevant page table mappings for each process and the physical address space.Virtual Memory Address Space = 48 bits Physical Memory Address Space = 46 bits Page size = 4KB An unknown long-running CPU-bound process Q runs on the server, occupying the entire memory space. Assume that process Q has all its data in memory, and no page faults occured. Question: What is the minimum & maximum possible overhead (in bytes) of all Q's direct page tables and directories? Under what conditions the minimum & maximum page table overhead can be achieved?
- A given process has a page table as shown below. Assume that the page size is 2048 and that all the pages are in main memory. What do the numbers 3, 2, 6, 7, and 11 represent? Be specific. To which logical address will the physical address 7356 correspond? To which physical address will the logical address (3,420) correspond? On the average, what will be the internal fragmentation associated with a process for the paging system? Page Table Page 0 3 Page 1 2 Page 2 6 Page 3 7 Page 4 11Answer 4, 5 and 6 only !! ( NO PLAGARISM) Assume the following scenario for multi-level paging used by a process that has following: a. Logical Address = 64 bits b. Page size = 1 M Byte c. Page table entry size = 4 Byte d. System is byte addressable. calculate the following. 1. Logical Address Space? 2. Maximum number of page table entries in a single page? 3. How many levels of page table entries will be used? 4. Compute the size of page tables at each level? 5. Compute the number of entries in a single page? 6. Compute the number of pagesBriefly highlight a plausible, demand-paged, virtual memory management scheme for a 32-bit architecture. The system uses 4 kB page frames, with page directory and page tables. Sketch the mapping of a logical 32-bit address onto an actual memory location for a user page
- Assume the following scenario for multi-level paging used by a process that has following: a. Logical Address = 64 bits b. Page size = 1 M Byte c. Page table entry size = 4 Byte d. System is byte addressable. calculate the following. 1. Logical Address Space? 2. Maximum number of page table entries in a single page? 3. How many levels of page table entries will be used? 4. Compute the size of page tables at each level? 5. Compute the number of entries in a single page? 6. Compute the number of pagesWe use the concept "paging" to map logical address to physical address. If the process size is 9216 bytes, the page size is 2048 bytes, how many frames should be allocated to this process? Do we have fragment? If so, please indicate the size of fragment?Consider a system with the following specifications: 46-bit virtual address space Page size: 8 KB Page table entry size (PTE): 4 bytes How many levels should a multi-level page table have, if the page table at each level must fit into a single page ? Explain.