Derive the Boolean logic expression for x3 for the common bus encoder ( see table 5-7) then draw the logic diagram circuit. Minimize the number of gates

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Q) Derive the Boolean logic expression for x3 for the common bus encoder ( see table 5-7) then draw the logic diagram circuit. Minimize the number of gates
TABLE 5-7 Encoder for Bus Selection Circuit
Inputs
Outputs
Register
selected
X1
X2
X3
X4
X5
X6
X7
S2
S1
So
for bus
None
1
AR
1
PC
1
1
DR
1
1
AC
1
1
1
IR
1
1
TR
1
1
1
1
Memory
401
O 0 0 0
400 000
800 00 0010
O 0 01 O 000
4100 0000
Transcribed Image Text:TABLE 5-7 Encoder for Bus Selection Circuit Inputs Outputs Register selected X1 X2 X3 X4 X5 X6 X7 S2 S1 So for bus None 1 AR 1 PC 1 1 DR 1 1 AC 1 1 1 IR 1 1 TR 1 1 1 1 Memory 401 O 0 0 0 400 000 800 00 0010 O 0 01 O 000 4100 0000
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