Design D lip-1lop from T lip-tlop

Design a D- Flip flop using 2:1 Mux.

it needs to combine the two circuits ch and sh to form a single half adder circuit with 2 outputs

Problem 3: Consider the sequential circuit below. Assume that by using the signal P, the flip- flops are brought to the initial state Q3=1, Q2=1, Q1=0, Q0=1. P CLK CLK CLK1 CLK2 CLK3 CLK4 CLK5 CLK6 R D Q3 1 S CLK R O Q2 Q2 Q2 1 D S CLK R O Q1 Q1 Q1 0 D S (a) Fill the table below, until the states start repeating, (where CLK1 is the first rising edge of clock, CLK2 is the second rising edge of clock, and so on.) Note: The table below is not a state table. CLK R QO QO Qo 1