es. • 001.1100, odd parity bit X • 110.1101, even parity bit Y
Comptia A+ Core 1 Exam: Guide To Computing Infrastructure (mindtap Course List)
10th Edition
ISBN:9780357108376
Author:Jean Andrews, Joy Dark, Jill West
Publisher:Jean Andrews, Joy Dark, Jill West
Chapter3: Supporting Processors And Upgrading Memory
Section: Chapter Questions
Problem 11TC
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![Question 12
Complete the partial code below to turn on GPIO port clocks to Ports A, B, and D
without affecting any other port clocks utilizing read-modify-write procedure.
Assume all provided code is correct, and select the correct register (XX) and the
missing line of code (YY) from the choices below.
SIM_SCGC5 EQU 0x40048038; bits 13-9 control clocks for Port E-A, respectively
LDR R1, =SIM_SCGC5; load config. reg. address
LDR R2, [R1]
YY
ORRS R2, XX
STR R2, [R1]
A) XX = R3, YY = LDR R3, =0x1600
B) XX = R3, YY = LDR R3, =0XOBOO
O C) XX = R4, YY = LDR R4, =OXOB00
D) XX = R2, YY = LDR R2, =0x1600
Question 11 (
Determine the specified parity bits "X" and "Y" for the following two 7-bit serial data
values.
• 001.1100, odd parity bit X
110.1101, even parity bit = Y
A) X = 0, Y = 1
B) X = 0, Y = 0
C) X = 1, Y = 1
D) X = 1, Y = 0](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F24d8d2dc-7a8b-49d0-bea2-205db22f4411%2Fe8d6505e-ba47-4db0-8039-7ba0d318dd6e%2Fk2lx99_processed.jpeg&w=3840&q=75)
Transcribed Image Text:Question 12
Complete the partial code below to turn on GPIO port clocks to Ports A, B, and D
without affecting any other port clocks utilizing read-modify-write procedure.
Assume all provided code is correct, and select the correct register (XX) and the
missing line of code (YY) from the choices below.
SIM_SCGC5 EQU 0x40048038; bits 13-9 control clocks for Port E-A, respectively
LDR R1, =SIM_SCGC5; load config. reg. address
LDR R2, [R1]
YY
ORRS R2, XX
STR R2, [R1]
A) XX = R3, YY = LDR R3, =0x1600
B) XX = R3, YY = LDR R3, =0XOBOO
O C) XX = R4, YY = LDR R4, =OXOB00
D) XX = R2, YY = LDR R2, =0x1600
Question 11 (
Determine the specified parity bits "X" and "Y" for the following two 7-bit serial data
values.
• 001.1100, odd parity bit X
110.1101, even parity bit = Y
A) X = 0, Y = 1
B) X = 0, Y = 0
C) X = 1, Y = 1
D) X = 1, Y = 0
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