For a direct-mapped cachedesign with a 64-bit address,the following bits of theaddress are used to access thecache.TagIndexOffset63-109-54-0(A) What is the cache blocksize (in words)?(B) How many blocks does thecache have?(C) What is the ratio betweentotal bits required for such acache implementation over thedata storage bits?

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For a direct-mapped cache design with a 64-bit address, the following bits of the address are used to access the cache.

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Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

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Question

For a direct-mapped cache
design with a 64-bit address,
the following bits of the
address are used to access the
cache.
Tag
Index
Offset
63-10
9-5
4-0
(A) What is the cache block
size (in words)?
(B) How many blocks does the
cache have?
(C) What is the ratio between
total bits required for such a
cache implementation over the
data storage bits?

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