For a direct-mapped cache design with a 64-bit address, the following bits of the address are used to access the cache. Tag Index Offset 63-10 9-5 4-0 [20] <§5.3> For each reference, list (1) its tag, index, and offset, (2) whether it is a hit or a miss, and (3) which bytes were replaced (if any).

Computer Networking: A Top-Down Approach (7th Edition)
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Author:James Kurose, Keith Ross
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Chapter1: Computer Networks And The Internet
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For a direct-mapped cache design with a 64-bit address, the following bits of the address are
used to access the cache.
Tag
Index
Offset
63-10
9-5
4-0
[20] <$5.3> For each reference, list (1) its tag, index, and offset, (2) whether it is a hit or a miss,
and (3) which bytes were replaced (if any).
Transcribed Image Text:For a direct-mapped cache design with a 64-bit address, the following bits of the address are used to access the cache. Tag Index Offset 63-10 9-5 4-0 [20] <$5.3> For each reference, list (1) its tag, index, and offset, (2) whether it is a hit or a miss, and (3) which bytes were replaced (if any).
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