If both input of a OR gate is short circuited than OR gate become AO 1. A BO 0.00 NOT gate DO None of above B
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- 19. Determine the output waveform in Figure 3–85.? 1.Repeat Problem 19 for a 4-input NOR gate. ?What will be the truth table of 2 input NAND gate?i): Implement the Boolean function ? = ??̅? using 2-input NAND gates in optimized manner. ii): An Exclusive-OR gate has the following Boolean expression: Draw the schematic diagram for said Boolean expression entirely from NAND gates.
- 1. Show how to implement 32K× 16 EPROM using two 32K×8 EPROM?2. List the pins related to the interruptsPlease write equations for both the pull up and pull down of the complex gate. Note: these are not supposed to be exact compliments. Thank you!F(a,b,c,d)=ab'+c'd'+a'cd' Perform the function in accordance with the following styles using the Karnaugh diagram. Draw each simplification using the corresponding logic gates. a) only or not (NOR) b) and not just (NAND) c) OR-NAND d) AND-NOR
- Question 3:a) We can construct the full adder/Sub tractor with the help of AND-OR gate and also by using exclusive OR Gate. What is the between these two circuits?b) Construct the circuit of multiplexer which can multiply more than two bits.why the XOR gate output corresponds to the sum bit, while the AND gate output corresponds to the carry bit?1- What does the VOH parameter of a logic IC refer to? a) The highest permissible output voltage. b) The lowest output voltage recognized as logic 1. c) The highest output voltage recognized as logic 1. d) The highest output voltage recognized as logic 0. 2- Which of the following refers to the noise margin of a logic gate? a) The difference between VIH and VOL b) The difference between VOH and VOL c) The difference between VOH and VIH d) The difference between VIH and VIL 3- How many 74LS00 NAND gate inputs can be driven by a 74LS00 NAND gate outputs Refer to data sheet of 74LS00, the maximum values of IOH = 0.4 mA, IOL = 8 mA, IH = 20 μA, and IL = 0.4 mA. 4- The data sheet of a quad two-input NAND gate specifies the following parameters: IOH (max.) 0.4 mA, VOH (min.) 2.7 V, VIH (min.) =2V, VIL (max.) 0.8 V, VOL (max.) 0.4 V, IOL (max.) 8 mA, IL (max.)=0.4 mA, IIH (max.)-20µA, ICCH (max.) 1.6 mA, ICCL (max.) 4.4 mA, tpLH =pHL=15 ns and a supply voltage range of 5…
- What is the fan out of the NAND gate in? (b) Of each NAND gate ?Implement Four-to-one-line multiplexer with Logic diagram and Function table.Explain each component of the block diagram of a frequency counter. - Input: - Accurate time-base / clock: - Decade dividers and flip-flop: - Gate: - Counter/ latch: - Display: