| Figure Q2b depicts a FET amplifier circuit. Determine the followings: i) the quiescent drain current, Ioa, ii) the quiescent gate source voltage, Vesa, ii) the quiescent drain source voltage, Vosa, iv) the source voltage, Vs and v) the drain voltage, Vo. +24 V 2k2 82M C. lo(on) = 6 mA Vas(Th) = 3 V Vas(on) = 7 V 100R V,oW H 47M 1k5 C, Figure Q2b H

| Figure Q2b depicts a FET amplifier circuit. Determine the followings: i) the quiescent drain current, Ioa, ii) the quiescent gate source voltage, Vesa, ii) the quiescent drain source voltage, Vosa, iv) the source voltage, Vs and v) the drain voltage, Vo. +24 V 2k2 82M C. lo(on) = 6 mA Vas(Th) = 3 V Vas(on) = 7 V 100R V,oW H 47M 1k5 C, Figure Q2b H

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...

See similar textbooks

Similar questions

(a) What are the output currents and output resistances for the current sources as shown if IREF = 45 μA, K'n = 25 μA/V2, VTN = 0.75 V and λ =0.01V−1?(b) What are the currents if IREF is changed to 50 μA?(c) What would be the values if λ =0?
NOTE: FOR ALL CIRCUITS SHOWN IN THIS QUIZ ASSUME THAT: β= 100 (for all transistors) ; Early voltage equal to infinity. 2. - For the circuit shown in figure B, determine:a) The values of IcQ and VceQ for Q1 and Q2b) The input resistance Ri and the output resistance Ro
Common gate configuration What is the relation of ID and VGS to the q-point. Explain
For each of Common Source(CS), Common Gate(CG), Common Drain(CD)ampliers,1. Show its operating principle2. How DC biasing can be done
Given the PMOSFET circuit below with VDD = 5 V, and characteristics k = 25 μA/V2, Vth = 0.75V and R = 100, solve for the drain voltage and drain current
(a) What is the output current IO in the circuitshown if −VEE = −10 V andR = 20 ohm? Assume that the MOSFET is saturated.(b) What is the minimum voltage VDDneeded to saturate the MOSFET if VTN = 2.5 Vand K'n = 0.25 A/V2. (c) What must be the powerdissipation ratings of resistor R and the FET.
The circuit shown ensures a constant current of 100 mA is delivered to the load even if the load conditions are changing. The Zener breakdown voltage is 5 V. Determine the value of R needed. Assume the transistor is Silicon and that V+ is large enough to cause the Zener to go into breakdown and to prevent the transistor from going into saturation. Assume further that the collector and emitter currents are approximately equal.
The switches as shown can be implemented using MOSFETs, as shown. What must be the W/L ratios of the transistors if the onresistance of the transistor is to be less than 1 percent of the resistor 2R = 12 kΩ? Use VREF = 3.0V. Assume that the voltage applied to the gate of the MOSFET is 5Vwhen b1 = 1 and 0Vwhen b1 = 0. For the MOSFET, VTN = 1 V, Kn = 50 μA/V2, 2φF = 0.6 V, and γ = 0.5√V.
Modify the circuit in the figure considering that the Thévenin source can give a maximun current of 20μA and through the transistor a maximum current of IC (max) = 7mA can circulate. Consider that the voltage of Thévenin Vth = 5V and that R2 = 50Kohms.
An n-channel JFET has a drain-source saturation current IDSS = 10 mA and a gate-source pinch-off voltage of -4 volts. If the drain current is 2.5 mA, calculate the gate-source voltage, VGS.
The switches as shown can be implementedusing MOSFETs, as shown. Whatare the W/L ratios of the transistors if the onresistanceof the transistor is to be less than 1 percentof the resistor 2R = 10 kohm ? Assume thatthe voltage applied to the gate of the MOSFET is5 V when b1 = 1 and 0 V when b1 = 0. For theMOSFET, VTN = 1 V, K'n= 50 A/V2, 2φF = 0.6V, and γ = 0.5√V.
A variety of current source values were applied to the device shownin P2.15(a). The power absorbed by the device for each value ofcurrent is recorded in the table given in P2.15(b). Use the values inthe table to construct a circuit model for the device consisting of a singleresistor from Appendix H.