Question 01 : (a) Write an assembly language program for the Intel 8086 microprocessor that adds two 16-bit words in the memory locations called ADD1 and ADD2, respectively, and stores the result in a memory location SUM? In the assembly language program, make sure to properly define the different segments using the appropriate assembler directives. (b) Draw a diagram showing the data arrangement in memory for the multiply program you wrote in section (a)?
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- 01 : (a) Write an assembly language program for the Intel 8086 microprocessor that adds two 16-bit words in the memory locations called ADD1 and ADD2, respectively, and stores the result in a memory location SUM? In the assembly language program, make sure to properly define the different segments using the appropriate assembler directives. (b) Draw a diagram showing the data arrangement in memory for the multiply program you wrote in section (a)?(a) Write an assembly language program for the Intel 8086 microprocessor that divides a 32-bit number by a 16-bit word and stores the results i.e., quotient and reminder, in separate memory locations? (Choose the dividend and divisor by yourself).In the assembly language program, make sure to properly define the different segments using the appropriate assembler directives.(b) Draw an appropriate flow diagram for this program.I have this problem from my textbook that I do not understand, despite re-reading the section on segmentation and paging. "The IBM system/370 architecture uses a two-level memory structure and refers to the two levels as segments and pages, although the segmentation approach lacks many of the features described in Chapter 8. For the basic 370 architecture, the page size may be either 2 KB or 4 KB, and the segment size is fixed at either 64 KB or 1 MB. For the 370/XA and 370/ESA architectures, the page size is 4 KB and the segment size is 1 MB. What advantages of segmentation does this scheme lack? What is the benefit of segmentation for the 370?"Can you help me undertand what they are looking for in this explanation?
- Answer the given question with a proper explanation and step-by-step solution. PLEASE PAY ATTENTION TO THE DATA TYPES AND FOLLOW THE CODE AND DIRECTIONS EXACTLY Convert the following C++ program into an x86 assembly language program.Comment the start of each "code block" that performs one of the listed mathematical calculations.Comments go to the right of the actual code, all starting on the same column.Post ONLY your ASM file here to Blackboard when complete. // Global variableschar a = 5;char b = 6;char c = 7;char d = 8;char e = 2;char f = 3;char g = 1;char h = 4;// Codeint main(){ --h; c = g + h; d = e + 22 - c - b; g = -h; ++b; a = g + d - 15; b = a + 92 - b; h = d + (-f) - d; // Move a into the eax register // Move b into the ebx register // Move c into the ecx register // Move d into the edx register // Call the DumpRegs function // Move e into the eax register // Move f into the ebx register // Move g into the ecx register…For the MIPS assembly instructions below, what is thecorresponding C statement? Assume that the variables f, g, h, i, and j areassigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume thatthe base address of the arrays A and B are in registers $s6 and $s7,respectively. Note: for each line of MIPS code below, write the respective Ccode. After that, write the corresponding C code for the MIPS.sll $t0, $s0, 2add $t0, $s6sll $t1, $s1, 2 add $t1, $s7, $t1lw $s0, 0($t0)addi $t2, $t0, 4lw $t0, 0($t2)add $t0, $t0, $s0sw $t0, 0($t1)Please solve and show all work. For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: f = (g+i+2) + (h − 8); B[8] = A[i-9] + A[j+8] + 7;
- Which statement is correct for the memory segments in 8086 microprocessor? a. For Stack segment, the offset address can be a direct value. b. The offset address for program instructions is taken from SP register. c. Variables created in the Assembly program are stored in Data segment. d. Segment address for executing sub-routines is taken from ES register.Please look at the entire text below. Please solve and show all work. Thank you. What is the corresponding MIPS assembly code for the following C statement? Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[8] = A[i−j] Translate the following C code to MIPS. Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: B[8] = A[i] + A[j] Assume that registers $s0 and $s1 hold the values 0x80000000 and 0xD0000000, respectively. What is the value of $t0 for the following assembly code? add $t0, $s0, $s1 Is the result in $t0 the desired result, or has there been an overflow? For the contents of registers $s0 and $s1 as…6. Assume that two numbers: dividend and divisor are saved in memory address M1 and M2 respectively. Quotient and remainder should be saved in R1 and R2 respectively. Write assembly language instructions and then list microoperations for each instruction and list the control signals required to be activated for each microoperation. MBR is used as buffer for any register to register transfer operation. Signal Description: Control signals operation Comments C0 MAR to RAM (through address bus) C1 PC to MBR C2 PC to MAR C3 MBR to PC C4 MBR to IR C5 RAM to MBR C6 MBR to ALU C7 Accumulator to ALU C8 IR to MAR C9 ALU to Accumulator C10 MBR to Accumulator C11 Accumulator to MBR C12 MBR to RAM (through data bus) C13 IR to Control Unit C14 MBR to R1 C15 MBR to R2 C16 MBR to R3 C17 MBR to R4…
- (a) Write an assembly language program for the Intel 8086 microprocessor that divides a 32-bit number by a 16-bit word and interrupts if the result is greater than the reserved memory location. Show both the Mainline Program and Interrupt service procedure using push and pop instructions.In the assembly language program, make sure to properly define the different segments using the appropriate assembler directives.(b) Draw an appropriate flow diagram for this program.For the MIPS assembly instructions below, what is the corresponding C statement?Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and$s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. sll $t1, $s1, 2add $t1, $t1, $s6lw $t1, 0($t1)sub $t0, $s3, $s4sll $t0, $t0, 2add $t0, $t0, $s7lw $t0, 0($t0)add $t1, $t1, $t0sll $t0, $s0, 2add $t0, $t0, $s7sw $t1, 0($t0)Please solve and show all work. Thank you. What is the corresponding MIPS assembly code for the following C statement? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 4-byte words: f = g + (h − 5); B[8] = A[i] + A[j+1];