Assume we will compute C on a shared memory computer with a single core and a shared memory computer with four cores. Calculate the anticipated performance increase on the four-core computer, ignoring memory considerations.

We may assume that the number of accessible cores in modern CPUs is doubled with each new generation every 18 months. How much more off-chip memory bandwidth would a CPU released in three years need in order to maintain the same per-core performance?

If random access memory (RAM) and cache memory (both of which are comprised of transistors), then what is the function of cache memory? Do we need several different forms of memory, or can we get by with only one?

Calculate the CPU execution time (expressed in milliseconds) of a program with 10 million instructions on a 2.5 GHz CPU with the following basic instruction-type breakdowns and CPIs: Arithmetic: 60%, CPI = 2 Load & Store (assuming perfect caches): 25%, CPI = 5 Branching: 15%, CPI = 3 In addition, you are told that the overall cache miss rate for instructions is 1%, the overall cache miss rate for data is 3%, and the cache miss penalty is 100 cycles. You can ignore the hit time (consider it zero).