the diagram below, the chip on the right hand side, the 74HCT138, is provided with address information from the microprocessor and then activates one of its output lines to select a memory bank. The 74HCT138 is A multiplexer A demultiplexer An encoder A decoder A comparator

the diagram below, the chip on the right hand side, the 74HCT138, is provided with address information from the microprocessor and then activates one of its output lines to select a memory bank. The 74HCT138 is A multiplexer A demultiplexer An encoder A decoder A comparator

Enhanced Discovering Computers 2017 (Shelly Cashman Series) (MindTap Course List)

1st Edition

ISBN:9781305657458

Author:Misty E. Vermaat, Susan L. Sebok, Steven M. Freund, Mark Frydenberg, Jennifer T. Campbell

Publisher:Misty E. Vermaat, Susan L. Sebok, Steven M. Freund, Mark Frydenberg, Jennifer T. Campbell

Chapter4: Programs And Apps: Productivity, Graphics, Security, And Other Tools

Section: Chapter Questions

Problem 29CT

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Concept explainers

Fundamentals of Input and Output Performance

The I/O subsystem is a component of computer system design that uses buses to assist communication between the Central Processing Unit, Computer Memory/Storage, and Input and Output Devices (that is known as peripheral devices). The I/O subsystem includes disc controllers, tape drives, discs, system buses, and other devices. The I/O database application reads and writes drives using the operating system windows I/O.

Question

In the diagram below, the chip on the right hand side, the 74HCT138, is provided with address information from the microprocessor and then activates one of its output lines to select a memory bank. The 74HCT138 is

A multiplexer

A demultiplexer

An encoder

A decoder

A comparator

74HCT
Memory bank 0
RD
RD -
138
E3
Memory bank 1
WR
WR O
Memory bank 2
IO/M
q E2
Memory bank 3
A15
4 b
Memory bank 4
8085A
microprocessor
A14
A2
Memory bank 5
A13
A1
Memory bank 6-
Address
lines
A12
Ao
Memory bank 7
A11
То
memory
ICs
Ao

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