1) Choose the correct answer of the following: 1) The bus used to connect the cache memory to main memory is, c) System bus 2) Computer architecture in which Data and instructions are stored in a single read-write memory is: c) Modified Harvard a) local bus b) PCI bus d) ISA Bus d) None of the mentioned a) Harvard b) von Architecture Neumann 3) Memory hierarchy, the relation between inboard memory and off-line storage, the inboard are: b) cheaper, faster. c) larger, faster. d) None of the mentioned a) cheaper, larger. 4) The version of DRAM, which can send data twie per elock cycle, once on the rising edge of the clock pulse and once on the falling edge is called: a) DDR-DRAM b) CDRAM c) RDRAM d) SDRAM

Systems Architecture
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ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter4: Processor Technology And Architecture
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.1) Choose the correct answer of the following:
1) The bus used to connect the cache memory to main memory is,
a) local bus
b) PCI bus
c) System bus
d) ISA Bus
2) Computer architecture in which Data and instructions are stored in a single read-write memory is:
a) Harvard
Architecture
c) Modified
b) von
d) None of the
mentioned
Neumann
Harvard
3) Memory hierarchy, the relation between inboard memory and off-line storage, the inboard are:
b) cheaper,
faster.
a) chcaper, larger.
c) larger, faster.
d) None of the
mentioned
4) The version of DRAM, which can send data twice per clock eycle, once on the rising edge of the
clock pulse and once on the falling edge is called:
a) DDR-DRAM
b) CDRAM
c) RDRAM
d) SDRAM
5) In direct mapping cache memory, the Block number 5m-1 is mapping in cache line:
Transcribed Image Text:.1) Choose the correct answer of the following: 1) The bus used to connect the cache memory to main memory is, a) local bus b) PCI bus c) System bus d) ISA Bus 2) Computer architecture in which Data and instructions are stored in a single read-write memory is: a) Harvard Architecture c) Modified b) von d) None of the mentioned Neumann Harvard 3) Memory hierarchy, the relation between inboard memory and off-line storage, the inboard are: b) cheaper, faster. a) chcaper, larger. c) larger, faster. d) None of the mentioned 4) The version of DRAM, which can send data twice per clock eycle, once on the rising edge of the clock pulse and once on the falling edge is called: a) DDR-DRAM b) CDRAM c) RDRAM d) SDRAM 5) In direct mapping cache memory, the Block number 5m-1 is mapping in cache line:
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