9- Design a simple memory of type RAM starting from address 0001 to 0110 with memory width is 8 cells and each cell can be presented in two bytes. Find the total size of this memory? Draw the final design?

9- Design a simple memory of type RAM starting from address 0001 to 0110 with memory width is 8 cells and each cell can be presented in two bytes. Find the total size of this memory? Draw the final design?

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter5: Data Storage Technology

Section: Chapter Questions

Problem 2PE

See similar textbooks

Related questions

Q: b) Sketch a diagram showing that the data transfer from CPU to memor memory to CPU including the…

A: Here explain the diagram given below: ================================== 1.here we uses two buses…

Q: Design a machine with a byte addressable main memory of 2 bytes and and block size of 8 bytes.…

A: answer is below:-

Q: Question 5 a) Discuss the differences between RAM and ROM including its application. Give example of…

Q: 7. Suppose that. DS = 0200H, BX = 0300H, and DI = 400H Determine the memory address accessed by each…

A: Given data, DS= 0200H BX= 0300H DI= 400H To find :- Memory address for following instructions at…

Q: 3) The physical address is the actual location within the RAM. It is pu bus by the CPU to be decoded…

A: 1. Logical address =CS:IP =426:A436 2.offset address = IP…

Q: Why do we require cache memory if both RAM (Random Access Memory) and cache memory are…

A: Introduction: To begin, you must understand the concepts of cache and RAM memory.Cache: Cache Memory…

Q: Design a machine with a byte addressable main memory of 216 bytes and block size of 8 byte. Assume…

Q: 3- Suppose that DS = 100H, SS = 300H, BP = 200H, and SI = 0100H, BX= 1500H . Determine the memory…

A: DATA Given:- DS=100H SS=300H SI=0100H BX=1500H Instruction : MOV DL,[BP+200] Operation : Real…

Q: 1 Problem: Draw the complete diagram of a 256KX8 memory that uses RAM chips with the following…

A: Total # of 32Kx4 RAM Chips required = 256Kx8 / 32Kx4 = 8x2 = 16 These 16 chips will be arranged as 8…

Q: EAROM is form of semi conductor memory in which it is possible to change the contents of selected…

A: Given that, EAROM is form of semi conductor memory in which it is possible to change the contents of…

Q: 1. The table below presents a list of devices that are to be addressed in a certain memory space.…

A: Here is the solution for the first problem

Q: Q13/Assume that the microprocessor can directly address 64K with a and 8 data pins The memory map…

A: Assume that the microprocessor can directly address 64k with a and 8 data pins the memory map for…

Q: Q13/Assume that the microprocessor can directly address 64K with a and 8 data pins The memory map…

A: check further steps for the answer :

Q: A-Develop an assembly program that transfer a block of 100H bytes from memory location A00h to…

A: The register used here are C,H,A,D . MVI instruction is used to move the data .

Q: The following equation was suggested both for cache memory and disk cache memory Ts = Tc + M * Tp…

A: The Answer is

Q: Consider cache memory 90% hit ratio is required to be installed in a memory system to reduce the…

A: Given, Hit ratio = 90 % Then, Hit rate = 0.9 Miss rate = 1 - hit rate = 1 - 0.9 = 0.1 According to…

Q: Explain the role of base and limit register in memory protection. Determine whether the following…

A: The formula to find if the logical address generated by the CPU is legal or illegal can be found…

Q: Design a machine with a byte addressable main memory of 216 bytes and block size of 8 byte. Assume…

A: Consider a machine with a byte addressable main memory of 216 bytes and block size of 8 bytes.…

Q: 2. Design your own 16 bits Memory Map, and choose the amount of memory space required for various…

A: 16bit processor,16bit(word-sized), can address 64k of RAM. 220(1048576)bytes, so can construct 20bit…

Q: Why do we need cache memory when RAM (Random Access Memory) is already available as a volatile…

A: Why do we need cache memory when RAM (Random Access Memory) is already available as a volatile…

Q: SUBJECT: COMPUTER ORGANASATION 1. a. How many address bits are required to access 256K words of…

Q: Question 1: Design the RAM which has following address. 2048 x 4 RAM 8192 x 8 RAM ---

A: Given Data : Given RAM size = 2048 x 4 Size of RAM that is need to be designed = 8192 x 8

Q: To get the physical address from the logical address generated by CPU we use ____ . a. MAR b. MMU c.…

A: Task :- Choose the correct option for given question.

Q: 1) Write simple instructions (simple program) that will add two consecutive bytes of data storied…

A: In Direct addressing mode, we directly give the address of the location, where we want to retrieve…

Q: Use 16 memory blocks to cover the 1M Memory of the 8086 Microprocessor and define the address range…

A: Memory Address Decoding

Q: 1. Consider memory storage of a 32-bit word stored at memory word 34 in a byte- addressable memory.…

A: Given word= 34 of 32 bit find:- (a) What is the byte address of memory word 34? (b) What are the…

Q: Q12/Assume that the microprocessor can directly address 1M with a and 8 data pins, The maximum RAM…

A: I have answered this question in step 2.

Q: Problem-02: Calculate the number of bits required in the address for memory having size of 16 GB.…

A: Let ‘n’ number of bits are required.

Q: Q.9 Design a RAM architecture with 8 bit DRAM or SRAM cells. Consider the size of the RAM is 1KB.

A: Given RAM 1Kb ...

Q: 16. If the first instruction "LXI H, 1100H" is positioned at address 7000H in memory, at what…

A: Correct answer of above given question is Option(1) 7003H i.e next instruction is located at address…

Q: The following program has been written for the simple central processing unit introduced in clas The…

A: # Hex Binary Assembly Code Description 0 2e 101110 cs 1 b0 10110000 .byte 0xb0 Byte 2 d4 11010100…

Q: Question 1 Solution should use this website for solution Sim8085 - A 8085 microprocessor simulator…

A: The program to find 2's complement of 8 bit number is given below:-

Q: Given a 32M x 16 bit memory chip. Answer the following questions. a) Draw the memory chip. Label…

Q: b. How many bits are required to address a 4M × 16 main memory if main memory is byte-addressable?c.…

A: A memory is used to store some data on the computer. The data is stored in memory has a unique…

Q: Q3/ Design a machine with a byte addressable main memory of 216 bytes and block size of 8 byte.…

A: Given that, Size of main memory= 216 bytes Block size= 8 bytes Number of lines= 32

Q: The purpose of adding cache between main memory and CPU is ( ). A. Solve the speed matching problem…

A: Here is the solution:

Q: Question Design a 1022*6 ROM memory by using a 256*4 Rom memory

A: Solution Design a 1022*6 ROM memory by using a 256*4 Rom memory we have 256*4 Rom memory where…

Q: {4, 5, 6}, {7, 8, 9), {1, 2, 3), }; If array a's memory address is 0x301C and each pointer is 8…

A: In this question, we have asked certain values and we have to tell the output of those lines:

Q: Q1. Design the following memory devices using multiplexers and D flipflops. a) 2 Bytes (2…

A: 2 Bytes With 1 multiplexer (2 inputs, 1 selector) we can fetch data from 2 memory locations. 16…

Q: a) Define RAM. Show the logic diagram of a single bit memory cell using J-K flip flop. b) The…

A: Introduction: RAM - (RANDOM ACCESS MEMORY) RAM is a computer's short-term memory, which…

Q: Draw a memory unit which has 3-Address lines, 8-Data lines, and 8-output lines with Read and write.

A: According to the question

Q: Q12/Assume that the microprocessor can directly address 1M with a and 8 data pins, The maximum RAM…

A: assume microprocessor can directly address 1M with a and 8 data pins , the maximum RAM systems can…

Q: 27 For a 128GB of 32-bit Data memory, which is more suitable to be used for design of this memory :…

A: The solution to the given problem is below.

Q: Design a machine with a byte addressable main memory of 216 bytes and block size of 8 byte. Assume…

A: Direct Mapping: Direct mapping is a procedure used to assign each memory block in the main memory to…

Q: Design a simple memory of type RAM starting from address 0011 to 0111 (N) with memory width (W) is 8…

A: Introduction to RAM Memory RAM (Random Access Memory) is the internal memory of the CPU for storing…

Q: Q47/ Design maximum RAM system using the following RAM chips ( the memory chip is enabled only when…

A: It is defined as a system call provides mapping in the virtual address space of the calling process…

Q: C)Explain the principles of content-addressable memory.

A: Content-Addressable Memory is a Special Type of Computer Memory Used in Certain Very High-Speed…

Q: 1. How many bits are required to address a 8M × 16 main memory if a) Main memory is…

A: Below is the answer to above question. I hope this will be helpful for you..

Concept explainers

Computer Fundamentals

The computer is termed computation. For calculating or computing something the device that has been used is known as the computer. Or we can say that for performing a fast arithmetic operation the device that has been used is a computer. Storing, processing, and retrieving are the main features of a computer. 

Question

9- Design a simple memory of type RAM starting from address 0001 to 0110 with memory width is 8 cells
and each cell can be presented in two bytes. Find the total size of this memory? Draw the final design?
10- Design a simple memory of type RAM starting from address 0011 to 0111 with memory width is 8
cells and each cell can be presented in two bytes. Find the total size of this memory? Draw the final design?
11- 10- Design a simple memory of type RAM starting from address 0011 to 0111 with memory width is

Expert Solution

This question has been solved!

Explore an expertly crafted, step-by-step solution for a thorough understanding of key concepts.

SEE SOLUTION Check out a sample Q&A here

Step 1

VIEW

Step 2

VIEW

Step by step

Solved in 2 steps with 1 images

SEE SOLUTION Check out a sample Q&A here

Knowledge Booster

Learn more about

Need a deep-dive on the concept behind this application? Look no further. Learn more about this topic, computer-science and related others by exploring similar questions and additional content below.

Similar questions

Most Intel CPUs use the __________, in which each memory address is represented by two integers.
LI is the fastest type of cache memory built into a computer, faster even than DDR4 SDRAM memory. True or False?
Suppose that 16M × 16 memory built using 512K × 8 RAM chips and that memory is word addressable.1. a) How many RAM chips are necessary?2. b) If we were accessing one full word, how many chips would be involved? 3. c) How many address bits are needed for each RAM chip?4. d) How many banks will this memory have?5. e) How many address bits are needed for all memory?6. f) If high-order interleaving is used, where would address 14 (which is E in hex) be located?7. g) Repeat exercise 9f for low-order interleaving.
Suppose that a 2M × 16 main memory is built using 256K × 8 RAM chips and that memory is word addressable.1. a) How many RAM chips are necessary?2. b) If we were accessing one full word, how many chips would be involved? 3. c) How many address bits are needed for each RAM chip?4. d) How many banks will this memory have?5. e) How many address bits are needed for all memory?6. f) If high-order interleaving is used, where would address 14 (which is E in hex) be located?7. g) Repeat exercise 9f for low-order interleaving.
Assume a 2^20 byte memory (2^20 x 8):A. What are the lowest and highest addresses if memory is byte-addressable?B. What are the lowest and highest addresses if memory is word-addressable, assuming a16-bit word?C. What are the lowest and highest addresses if memory is word-addressable, assuming a32-bit word?
Suppose that a 64M x 16 main memory is built using 512K × 8 RAM chips and memory is word-addressable. a) How many RAM chips are necessary?b) If we were accessing one full word, how many chips would be involved?c) How many address bits are needed for each RAM chip?d) How many banks will this memory have?e) How many address bits are needed for all of memory?f) If high-order interleaving is used, where would address 32(base 10) be located? (Your answer should be "Bank#, Offset#")g) Repeat (f) for low-order interleaving.
Suppose that a 64 Mega x 16 bits main memory is built using 16M x 8 bits chips of RAM and memory is word addressable. a. How many RAM chips are necessary? ______ b. How many RAM chips are needed for each memory word? _______ c. How many address bits are needed for each RAM chip? _______ d. How many address bits are needed for all memory? _______
Suppose that a 32M X 32 memory built using 512K X 8 RAM chips and memory is word-addressable. 1) How many RAM chips are necessary? 2) If we were accessing one full word, how many chips would be involved? 3) How many address bits are needed for each RAM chip? 4) How many banks will this memory have? 5f) If high-order interleaving is used, where would address 0x11011 be located? (Answer should be: bank# & offset#)
Suppose that a 4M × 32 main memory is built using 128K × 8 RAM chips and memory is word addressable (word size = 32 bits)a. How many RAM chips are needed?b. How many chips would be involved when accessing a full word?c. How many banks will this memory have?d. How many address bits are needed for the whole main memory?e. If high-order interleaving is used, where would the address 7060016 be located (in which bank)?f. If low-order interleaving is used, where would the address 2C77D516 be located?
20. Which of the following statements is true of memory sizes? a. A 3 kb memory has 3000 memory bits b. A 16 × 4 memory has 64 words c. A 4 kb memory has 4096 memory bits d. A 32 × 16 memory has 16 words 21. Which of the following statements about cache is NOT true? a. A cache typically resides on-chip with the processor. b. A cache is faster and has higher capacity than memory. c. A cache hit means that an item is found in the cache. d. SRAM is faster than DRAM
A computer is using a fully associative cache and has 216 bytes of main memory (byte addressable) and a cache of 64 blocks, where each block contains 32 bytes. a. How many blocks of main memory are there? b. What will be the sizes of the tag, index, and byte offset fields? c. To which cache set will the memory address 0xF8C9(hexadecimal) map?
A 32-bit computer has a memory of 256 KB and a cache line size of 64 bytes. The memory cache access time is 5ns. This cache is 4-way associative and use LRU as a replacement algorithm. a) What is the number of lines and sets of this memory cache? b) What is the block size transferred between the cache memory and the main memory? c) If the time to transfer a line to cache memory is 200 ns, what is the hit ratio needed to obtain an average access time of 20 ns?