A computer system has a main memory consisting of 2M 32-bit words. It also has an 8K-word cache organized in the block-set-associative manner, with 2 blocks per set and 128 words per block. a. Calculate the number of bits in each of the TAG, SET and WORD fields of the main memory address format. b. Assume that the cache is initially empty. Suppose that the processor fetches 2486 words from locations 0, 1, 2,…., 2485, in that order. It then repeats this fetch sequence 10 more times. If the cache is 5 times faster than the main memory, estimate the improvement factor resulting from the use of the cache. Assume that the LRU algorithm is used for block replacement.

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter4: Processor Technology And Architecture
Section: Chapter Questions
Problem 3PE: Processor R is a 64-bit RISC processor with a 2 GHz clock rate. The average instruction requires one...
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A computer system has a main memory consisting of 2M 32-bit words. It also has an 8K-word cache organized in the block-set-associative manner, with 2 blocks per set and 128 words per block.
a. Calculate the number of bits in each of the TAG, SET and WORD fields of the main memory address format.
b. Assume that the cache is initially empty. Suppose that the processor fetches 2486 words from locations 0, 1, 2,…., 2485, in that order. It then repeats this fetch sequence 10 more times. If the cache is 5 times faster than the main memory, estimate the improvement factor resulting from the use of the cache.
Assume that the LRU algorithm is used for block replacement.

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