A main memory unit with a capacity of 4 megabytes is built using 1Mx 1-bit DRAM chips.Each DRAM chip has 1K rows of cells with 1K Cells in each row. The time taken for a single refresh operation is 100 nanoseconds. The time required to perform one refresh operation on all the cells in the memory unit?

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter4: Processor Technology And Architecture
Section: Chapter Questions
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A main memory unit with a capacity of 4 megabytes is built using 1Mx 1-bit DRAM chips.Each DRAM chip has 1K rows of cells with 1K Cells in each row. The time taken for a single refresh operation is 100 nanoseconds. The time required to perform one refresh operation on all the cells in the memory unit?

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