Design Problem: A pattern recognizer with a 1-bit output n accepts a 1-bit input m. Output n becomes 1 only if the 0-1-0 pattern is seen at m (m is sampled every clock cycle). The circuit treats the incoming bit stream as overlapping sequences, i.e. the last bit of a previous sequence becomes the first bit of the next sequence. In effect, the circuit looks at the most recent three bits to check against the pattern, like below: Design a Moore-type circuit (using D-flipflop) for the pattern recognizer described above. Show the design process including the: ● m n ● State diagram State assignment clearly indicating which binary pattern corresponds to which state Excitation table ● K-maps Final equations for flip-flop inputs and output n. ● 0 0 1 0 1 1 0 1 0 1 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 ●

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Design Problem:
A pattern recognizer with a 1-bit output n accepts a 1-bit input m. Output n becomes 1 only if the
0-1-0 pattern is seen at m (m is sampled every clock cycle). The circuit treats the incoming bit
stream as overlapping sequences, i.e. the last bit of a previous sequence becomes the first bit
of the next sequence. In effect, the
circuit looks at the most recent three bits to check against the pattern, like below:
m
n
Design a Moore-type circuit (using D-flipflop) for the pattern recognizer described above.
Show the design process including the:
●
0 0 1 0 1 1 0 1 0 1 0 1 1
0 0 0 1 0 0 0 0 1 0 1 0 0
● State diagram
State assignment clearly indicating which binary pattern corresponds to which state
Excitation table
K-maps
Final equations for flip-flop inputs and output n.
●
Transcribed Image Text:Design Problem: A pattern recognizer with a 1-bit output n accepts a 1-bit input m. Output n becomes 1 only if the 0-1-0 pattern is seen at m (m is sampled every clock cycle). The circuit treats the incoming bit stream as overlapping sequences, i.e. the last bit of a previous sequence becomes the first bit of the next sequence. In effect, the circuit looks at the most recent three bits to check against the pattern, like below: m n Design a Moore-type circuit (using D-flipflop) for the pattern recognizer described above. Show the design process including the: ● 0 0 1 0 1 1 0 1 0 1 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 ● State diagram State assignment clearly indicating which binary pattern corresponds to which state Excitation table K-maps Final equations for flip-flop inputs and output n. ●
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