Draw a complete datapath for 5 staged (IF, ID, EX, MEM, WB)

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter8: Data And Network Communication Technology
Section: Chapter Questions
Problem 11RQ
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Draw a complete datapath for 5 staged (IF, ID, EX, MEM, WB) single-cycle operation that can perform the MIPS code given below. Show the connectivity and the bus width of the connections (in bits)s. Clearly indicate all ALU and Master control signals necessary to implement the
datapath.

MIPS Code:

lw $t0, 0($zero) % load x from Memory
add $t1, $zero, $zero
add $t2, $zero, $zero
L1: beq $t1, $t0, L2% compare i& x
add $t2,$t2, $t1
add $t2,$t2, $t1
addi$t1,$t1, 1
beq$zero, $zero, L1% go back to the loop
L2:sw $t2, 4($zero) % store result to Memory

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