For each of the following 12-bit PCM, determine the 8-bit compressed code, decoded 12-bit and the decoded analog voltage for a resolution of 5 mV: 100001000000 110011001010 100000010010 000000100000 010000000000 000000000100
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ANSWER ALL THE FOLLOWING QUESTIONS.
- For each of the following 12-bit PCM, determine the 8-bit compressed code, decoded 12-bit and the decoded analog voltage for a resolution of 5 mV:
- 100001000000
- 110011001010
- 100000010010
- 000000100000
- 010000000000
- 000000000100
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- What are the decimal values of the following 8-bit binary fractions? (a) 0.01100001(b) 0.10001000.Convert the decimal number 24710 to base 2, base 8, and base 16. Convert the following decimal numbers to binary: 12.34510, 10310, 45.77810, and 998110. Convert the following binary numbers to decimal: 111100012, 001011012, 10100012, and 10011102. Convert the following octal numbers to decimal: 7258, 15738, 46238 and 22148. Convert the following hexadecimal numbers to binary: FACE16, BAD16 and 9CEB16.Please answer this question in 10 mins i will surely rate your answer. 1. A combinational circuit adds either a 1 or 2 to a 4-bit binary number A. Assume that the inputs bb A3, A2, A1, A0 represent the 4-bit binary number. Another input is a control signal C. The circuit has outputs assumed to be X3, X2, X1 and Xo, which represent the 4-bit number X. When C=0, X=A+1 and when C=1, X=A+2. Assume that the inputs for which X > (1111)2 will never occur. Show the design steps in detail including truth tables, K-Maps, logic equation minimisation. Finally, design this circuit using only NAND gates and inverters .
- choice correct answers analogReadResolution() instruction accept bit resolution up to 16 12 32 the maximum of the programmed board - For Arduino ZERO, using 2.23 V built in reference, what is the input code if the default bit resolution was used for Vin = 1 V? 458 1836 459 1837 - For memory address (133F7) h with offset of (2031) h, what is the segment address? 15442 113C 33701 135F41 - What is the input for Arduino UNO if the input voltage is 3.25 V? Assume defaults 1008 644 645 1007Attach the proper even parity bit to the following codes:a) 11010b) 1001c) 0111101Which one of the following binary numbers is NOT a valid 8-bit BCD number a. 0001 0101 b. 1001 0111 c. 0101 0100 d. 0110 1101
- A 4-bit universal shifting register QA, QB, QC and QD and a single serial input called SI, has two inputs so that they determine how to operate, as follows: M0M1 = 00 indicates that it should keep the value of the current outputs, M0M1 = 01 indicates that you should shift right, M0M1 = 10 indicates that you should shift left, and M0M1 = 11 indicates that you should parallel load inputs A, B, C, and D. Design a minimum circuit that implement this record and draw the final schematic diagram. Include the entire design procedureWhat is the hexadecimal value stored in Register A after the following assembler has executed? LDA #0x71 NOTA NOTA LDR B,#0x71 ADC A,B LDR B,#0xEB ADC A,B NOTA LDR B,#0xD5 ADC A,B LDR B,#0x53 SBC A,B LDR B,#0x19 SBC A,B LDR B,#0x5E SBC A,BComputing the following two numbers using signed 2’s complement form with 8 bits : (convert the two operands to a binary format) +75 -52 ------ will generate a summation of: a. 00110011 b. 00010011 c. 00010111 d. 10010011
- A 4-bit binary up/down counter is in the binary state of zero. The next state in the DOWNmode is (a) 0001 (b) 1111 (c) 1000 (d) 1110Construct the circuit as shown below. Apply the 4-bit BCD digits through four switches and observe the decimal from 0 to 9. Input 1010 through 1111 have no meaning in BCD depending on the decoder, These values may cause either a black or a meaningless pattern of the six unused input conditions. What can you conclude from your answer?Question 5 a) Briefly explain the Nyquist theorem in the context of digital sampling. b) Using logic gates, design an active low chip select for the memory a 256 K memory device starting at address 38000016 in a 16 Megabyte memory space. c) Convert each of the following 8-bit signed magnitude binary numbers to decimal. i) 10110101(base 2) ii) 01000101(base 2) iii) 11101010(base 2) iv) 01011110(base 2)