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For sub $rd, $rs, $rtReg[rd] = Reg[rs] + Reg[rt] - Which resources (blocks) perform a useful function for the given instructions? - Use the following diagram for each instruction and trace its flow(use pen or highlighter) for the execution of that instruction. - List the units that are used for each instruction. (I mainly need help with tracing, please and thank you)

For sub $rd, $rs, $rtReg[rd] = Reg[rs] + Reg[rt] - Which resources (blocks) perform a useful function for the given instructions? - Use the following diagram for each instruction and trace its flow(use pen or highlighter) for the execution of that instruction. - List the units that are used for each instruction. (I mainly need help with tracing, please and thank you)

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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For sub $rd, $rs, $rtReg[rd] = Reg[rs] + Reg[rt]

- Which resources (blocks) perform a useful function for the given instructions?

- Use the following diagram for each instruction and trace its flow(use pen or highlighter) for the execution of that instruction.

- List the units that are used for each instruction.

(I mainly need help with tracing, please and thank you)

 

Branch 1 РСМих M u Add Add M RegMux u ALU operation Data MemWrite Register # ALUMUX PC Address Address Instruction Registers ALU Register # Zero Data Instruction memory memory Register # RegWrite Data 1. RegWrite MemRead 2. MemRead 3. ALUMUX 4. MemWrite 5. ALUOP 6. RegMux 7. Branch Control FIGURE 4.2 The basic implementation of the MIPS subset, including the necessary multiplexors and control lines. The top multiplexor ("Mux") controls what value replaces the PC (PC + 4 or the branch destination address); the multiplexor is controlled by the gate that "ANDS" together the Zero output of the ALU and a control signal that indicates that the instruction is a branch. The middle multiplexor, whose output returns to the register file, is used to steer the output of the ALU (in the case of an arithmetic-logical instruction) or the output of the data memory (in the case of a load) for writing into the register file. Finally, the bottommost multiplexor is used to determine whether the second ALU input is from the registers (for an arithmetic-logical instruction OR a branch) or from the offset field of the instruction (for a load or store). The added control lines are straightforward and determine the operation performed at the ALU, whether the data memory should read or write, and whether the registers should perform a write operation. The control lines are shown in color to make them easier to see. RegWrite MemRead ALUMUX MemWrite ALUOP RegMux Branch Instruction sub rd, rs, rt sw Srt, imm(Srs) beq Srs, Srt, Label and $rd, Srs, Srt
Transcribed Image Text:Branch 1 РСМих M u Add Add M RegMux u ALU operation Data MemWrite Register # ALUMUX PC Address Address Instruction Registers ALU Register # Zero Data Instruction memory memory Register # RegWrite Data 1. RegWrite MemRead 2. MemRead 3. ALUMUX 4. MemWrite 5. ALUOP 6. RegMux 7. Branch Control FIGURE 4.2 The basic implementation of the MIPS subset, including the necessary multiplexors and control lines. The top multiplexor ("Mux") controls what value replaces the PC (PC + 4 or the branch destination address); the multiplexor is controlled by the gate that "ANDS" together the Zero output of the ALU and a control signal that indicates that the instruction is a branch. The middle multiplexor, whose output returns to the register file, is used to steer the output of the ALU (in the case of an arithmetic-logical instruction) or the output of the data memory (in the case of a load) for writing into the register file. Finally, the bottommost multiplexor is used to determine whether the second ALU input is from the registers (for an arithmetic-logical instruction OR a branch) or from the offset field of the instruction (for a load or store). The added control lines are straightforward and determine the operation performed at the ALU, whether the data memory should read or write, and whether the registers should perform a write operation. The control lines are shown in color to make them easier to see. RegWrite MemRead ALUMUX MemWrite ALUOP RegMux Branch Instruction sub rd, rs, rt sw Srt, imm(Srs) beq Srs, Srt, Label and $rd, Srs, Srt
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