Given the allocated address regions in the memory layout of 32-bit MIPS, what is the size, in bytes, of the user's text segment? How many instructions can the largest user program have and still fit? O a. 192 MB, roughly 50 million instructions O b. 192 MB, roughly 200 million instructions 256 MB, roughly 67 million instructions 256 MB, roughly 268 million instructions C. O d. O e. 64 MB, roughly 67 million instructions O f. 64 MB, roughly 17 million instructions
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- The memory units that follow are specified by the number of words times the number of bits per word. How many address lines and input–output data lines are needed in each case?1. 8 K×322. 2 G×83. 16 M×324. 256 K×64Suppose a computer using direct mapped cache has 4G Bytes of main memory and a cache of 256 Blocks, where each cache Block has 16 Words, and Word Size is 4 Bytes. a)How many blocks of main memory? b)What is the format of a memory address as seen by the cache (Tag, Block and Word fields)? c)To which cache block will the memory reference 0000146A in Hex?Suppose a computer using fully associative cache has 224 words of main memory and a cache of 128 blocks, where each cache block contains 16 words. a. How many blocks of main memory are there? b. What is the format of a memory address as seen by the cache, that is, what are the sizes of the tag and word fields? c. To which cache block will the memory reference 01D87216 map?
- Given a computer equipped with 536,870,912 bytes of memory with 16-bit cells, how many bits are needed to specify a memory address?Suppose that a 4M × 32 main memory is built using 128K × 8 RAM chips and memory is word addressable (word size = 32 bits)a. How many RAM chips are needed?b. How many chips would be involved when accessing a full word?c. How many banks will this memory have?d. How many address bits are needed for the whole main memory?e. If high-order interleaving is used, where would the address 7060016 be located (in which bank)?f. If low-order interleaving is used, where would the address 2C77D516 be located?1.What is the difference between bit address 7CH and byte address7CH? What is the specific location of bit address 7CH in memory?
- A computer is using a fully associative cache and has 216 bytes of main memory (byte addressable) and a cache of 64 blocks, where each block contains 32 bytes. a. How many blocks of main memory are there? b. What will be the sizes of the tag, index, and byte offset fields? c. To which cache set will the memory address 0xF8C9(hexadecimal) map?Suppose that a 32M X 32 memory built using 512K X 8 RAM chips and memory is word-addressable. 1) How many RAM chips are necessary? 2) If we were accessing one full word, how many chips would be involved? 3) How many address bits are needed for each RAM chip? 4) How many banks will this memory have? 5f) If high-order interleaving is used, where would address 0x11011 be located? (Answer should be: bank# & offset#)Suppose that a 64M x 16 main memory is built using 512K × 8 RAM chips and memory is word-addressable. a) How many RAM chips are necessary?b) If we were accessing one full word, how many chips would be involved?c) How many address bits are needed for each RAM chip?d) How many banks will this memory have?e) How many address bits are needed for all of memory?f) If high-order interleaving is used, where would address 32(base 10) be located? (Your answer should be "Bank#, Offset#")g) Repeat (f) for low-order interleaving.
- Calculate Physical Address of Main memory • Given the contents of CS:IP = [3000H]:[100H] • Given the contents of SS:SP = [50A0H]:[300H] • Given the contents of ES:DI = [60C0H]:[200H] • Given the contents of DS:SI = [A1C0H]:[2F00H] • Given the contents [CS]:[IP]=[1F0AH]:[15A6H] • Given the contents [SS]:[SP]=[82FFH]:[0FA1H]Questions are from Microprocessor (8086)Consider a memory-management system based on paging. The total size of the physical address space 64 MB, Pages of size 4 KB, the Logical address space of 4GB. total number of pages are 16384, total number of frames are 16384 and the number of entries in a page table are 1048576.Now Calculate: a)Size of Page Table b) No of bits in Physical Address c) No of Bits in Logical AddressWhat is the difference between bit address 7CH and byte address 7CH? What is the specific location of bit address 7CH in memory?