Q4// Complete the table below according to the combinational logic circuit shown in figure below where A, B, X, and Y are four bit numbers whereas 7483 IC and 7485 IC are 4-bit binary parallel adder and 4-bit magnitude comparator respectively. A B XYZ 7483 A>B 0 110 0110 TTTTX 7485 A-B
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- Design a 4-bit arithmetic circuit, with two selection variables S1 and S0, that generates the arithmetic operations in the following table. Draw the logic diagram for a single bit stage. Note that B’ represents “Not B”. Please write down an optimized equation for Xi and Yi,1. Design a 4-bit ALU that performs Arithmetic (add, subtraction), and Logicoperations (AND, OR). The following control signals are to be considered:• A/S: add/subtract (0:add, 1:subtract)• A/O: and/or (0:and, 1:or)• A/L: arithmetic/Logic (0:arithmetic, 1:logic)• R/W: read/write signal (0:read, 1:write) Unit 3 (A/L) - Design a 4-bit ALU using Unit 1 and Unit 2. The control signal A/L willindicate which operation the ALU will perform (when the control signal is 0 performArithmetic, otherwise if the signal is 1 then perform Logic).Unit 4 (R/W)- Design three 4-bit parallel registers to hold A, B, and C where C keepsthe output of the ALU. The registers have a R/W control signal that indicates that theyare being written to or read from.1. Design a 4-bit ALU that performs Arithmetic (add, subtraction), and Logicoperations (AND, OR). The following control signals are to be considered:• A/S: add/subtract (0:add, 1:subtract)• A/O: and/or (0:and, 1:or)• A/L: arithmetic/Logic (0:arithmetic, 1:logic)• R/W: read/write signal (0:read, 1:write) The details of each control signal (Unit) are as follows.Unit 1 (A/S) - Design a 4-bit adder/subtractor that accepts two 4-bits numbers, A andB, and either add them up (A + B) or subtract them (A – B) depending on a controlsignal A/S (when the control signal is 0 perform ADD, otherwise if the signal is 1 thenperform SUB). The result will be stored in C.Unit 2 (A/O) - Design a 4-bit AND/OR unit that accepts two 4-bits numbers, A and B,and either AND them or OR them depending on a control signal A/O (when the controlsignal is 0 perform AND, otherwise if the signal is 1 then perform OR – bitwise logicaloperation). The result will be stored in C.Unit 3 (A/L) - Design a 4-bit ALU using Unit…
- 1. Design a SINGLE 4-bit ALU that performs Arithmetic (add, subtraction), and Logicoperations (AND, OR). The following control signals are to be considered:• A/S: add/subtract (0:add, 1:subtract)• A/O: and/or (0:and, 1:or)• A/L: arithmetic/Logic (0:arithmetic, 1:logic)• R/W: read/write signal (0:read, 1:write) The details of each control signal (Unit) are as follows. Unit 1 (A/S) - Design a 4-bit adder/subtractor that accepts two 4-bits numbers, A andB, and either add them up (A + B) or subtract them (A – B) depending on a controlsignal A/S (when the control signal is 0 perform ADD, otherwise if the signal is 1 thenperform SUB). The result will be stored in C. Unit 2 (A/O) - Design a 4-bit AND/OR unit that accepts two 4-bits numbers, A and B,and either AND them or OR them depending on a control signal A/O (when the controlsignal is 0 perform AND, otherwise if the signal is 1 then perform OR – bitwise logicaloperation). The result will be stored in C. Unit 3 (A/L) - Design a 4-bit ALU…Draw the 1-bit ALU circuit by designing the logic processor part of ALU which performs the operations described in the table.4 bit 2’s Complement Multiplier INPUT A: 4 bit 2’s Complement numberINPUT B: 4 bit 2’s Complement numberOUTPUT: the product of A x B represented as a 8 bit 2’s Complement number Do this:Build a 4 Bit UNSIGNED Multiplier as a subcircuit named UnsignedMultiplier use AND gate ,full and half adders for the circuit
- OPCODE | RS | RT | RD | (4) (2) (2) (2) (2) The Opcode is specified as below: Opcode (3) 000 R-type 001 lw 002 sw 003 beq 004 J Specify signal values for all of the above instructions. Build the control unit of SMIPS using combinational circuits. Test R, I and J type of instructions with this circuit.Write a Verilog HDL of an eight-bit arithmetic logic unit (ALU). The circuit has a three-bit select bus (Sel), two sixteen-bit input datapaths, an eight-bit output (y) datapath and performs the arithmetic and logic operations listed below. Verify using a testbench.4 bit 2’s Complement Multiplier INPUT A: 4 bit 2’s Complement number INPUT B: 4 bit 2’s Complement number OUTPUT: the product of A x B represented as a 8 bit 2’s Complement number PART 3: Build a 4 Bit UNSIGNED Multiplier as a subcircuit named UnsignedMultiplier use AND gate ,full and half adders for the circuit
- Write VHDL code for a modulo-13 counter (counting sequence is 010, 110, …. 1210). The counter has the following features: an asynchronous Active High Reset a value R can be loaded into the counter, using the signal Ld (Load) The signal Ld is active High Draw the schematic of your counter, showing the inputs and outputs. Show the number of bits for R, Q (output of the counter), Ld.Write VHDL code for a modulo-13 counter (counting sequence is 010, 110, …. 1210). The counter has the following features: an asynchronous Active Low Reset a value R can be loaded into the counter, using the signal Ld (Load) The signal Ld is active Low Draw the schematic of your counter, showing the inputs and outputs. Show the number of bits for R, Q (output of the counter), Ld.1. Design a 16*1 MUX using 4 *1 MUXs. 2. Design a 4-bit ALU to perform the following functions:A + B, A - B, A + 1, A’ . B’ ,A OR B, A XOR B, A AND B 3. Design a combinational logic that compares X and Y, where X = X1X0 and Y = Y1Y0; the output of combinational logic is 1, when X < Y; otherwise the output is 0.(a) Show truth table.(b) Find output function using K-map. 4. Design a logic circuit with three inputs and one output; the output generates even parity bit of the inputs.(a) Show the truth table. (b) Find output function. (c) Draw logic circuit.