QI) I BX=1000, DS-0200, SS=0100, CS-0300 and AL=EDH, for the following instruction: MOV [BX] + 1234H, AI. Find the physical address in the memory. Q2) For the above question, if BP is used instead of BX, what is the physical address in the memory?
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![QI) If BX=1000, DS=0200, SS=0100, CS-0300 and AL=EDH, for the following
instruction:
MOV [BX] + 1234H, AL.
Find the physical address in the memory.
Q2) For the above question, if BP is used instead of BX, what is the physical
address in the memory?](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F00139f8a-084a-4693-b9e4-1c818e77fae1%2F91f221b5-4640-4b47-a205-82dc972568a4%2Frxvh1z_processed.jpeg&w=3840&q=75)
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- Write down two differences between logical and physical addresses. Consider the following segment table:Assume that CS=3500, DS=4500, SS=5500, SI=2200, DI=4200, BX=7300, BP=8000, AX=3420 (all values are in hex). Calculate the physical address of the memory and show the contents in each of the following: a) MOV [BP]+10,AX b) MOV [SI],AX c) MOV [BX][DI]+20,AXAssume the following values are stored at the indicated memory addresses and registers Address Value 0x100 0xaaa 0x104 0x123 0x108 0x12 0x10c 0x10 Register Value %eax 0x100 %ecx 0x1 %edx 0x3 Fill up the following table: %eax 0x104 $0x108 (%eax) 4(%eax) 9(%eax,%edx) 260(%ecx,%edx) 0xFC(,%ecx,4) (%eax,%edx,4)
- instruction is in the first picture please give me only implementation of int L1lookup(u_int32_t address) and int L2lookup(u_int32_t address) cacheSim.h #include<stdlib.h>#include<stdio.h>#define DRAM_SIZE 1048576typedef struct cb_struct {unsigned char data[16]; // One cache block is 16 bytes.u_int32_t tag;u_int32_t timeStamp; /// This is used to determine what to evict. You can update the timestamp using cycles.}cacheBlock;typedef struct access {int readWrite; // 0 for read, 1 for writeu_int32_t address;u_int32_t data; // If this is a read access, value here is 0}cacheAccess;// This is our dummy DRAM. You can initialize this in anyway you want to test.unsigned char * DRAM;cacheBlock L1_cache[2][2]; // Our 2-way, 64 byte cachecacheBlock L2_cache[4][4]; // Our 4-way, 256 byte cache// Trace points to a series of cache accesses.FILE *trace;long cycles;void init_DRAM();// This function print the content of the cache in the following format for an N-way cache with M Sets// Set 0…Below is a list of 32-bit memory address references, given as memory addresses. 12, 720, 172, 8, 764, 352, 760, 56, 724, 176, 744You would like to access a cache with the given memory addresses. The size of cache is 23 = 8-blocks. Your task is to: (1) find out the binary address, (2) fill out the tag and index for each memory address and (3) indicate whether the access is hit or miss in the following table:Draw a picture illustrating the contents of memory, given the following data declarations: You need to mark all the memory addresses. Assume that your data segment starts at 0x1000 in memory. Name: .asciiz "Jim Bond!"Age: .byte 24Numbers: .word 11, 22, 33Letter1: .asciiz 'M' In this format HexadecimalAddress, Hex Value, Character/Number/Symbol, Binary Value, Decimal Value ALREADY HAVE! marking all the memory addresses. Assuming that the data segment starts at 0x1000 in memory. The Memory Layout looks like Byte by Byte Address Data 0x1000 4a 0x1001 61 0x1002 6d 0x1003 65 0x1004 73 0x1005 00 0x1006 18 0x1007 00 0x1008 0b 0x1009 00 0x100a 00 0x100b 00 0x100c 21 0x100d 00 0x100e 00 0x100f 00 0x1010 14 0x1011 00 0x1012 00 0x1013 00 0x1014 4d arrow_forward Step 2 In mips 1 word is equal to 4 bytes. Address Data…
- Show how the following values would be stored by byteaddressable machines with 32-bit words, using little endian and then big endian format. Assume that each value starts at address 10 . Draw a diagram of memory for each, placing the appropriate values in the correct (and labeled) memory locations.Q.) 0x14148888Convert given code to LEGv8 code:int f, g, y //global 64-bit variablesint sum (int a, int b) { // at memory address X0+1000.return (a +b)} int main (void) // at memory address X0 + 800{f=2;g=3;y= sum (f, g);return y;}Convert this code, making valid assumptions about registers and register use. Notethat brackets and global variable declarations are not affecting the addresses of the instructionsin memory.1. The hypothetical machine has two I/O instructions: 0011 = Load AC from I/O 0111 = Store AC to I/O In these cases, the 12-bit address identifies a particular I/O device. List the steps for every execution for the following program and illustrate using table that explain the process below : a. Load AC from device 5. b. Add contents of memory location 940. c. Store AC to device 6. d. Assume that the next value retrieved from device 5 is 3 and that location 940 contains a value of 2. Please pointing a, b,c ans. Because one I already upload this question and I didn't understand which one is and of a...please write ans a, b , c please
- 6. Assume a computer has 32-bit integers. Show how the value 0x0001122 would be stored sequentially in memory, starting at address 0x000, on both a big endian machine and a little endian machine, assuming that each address holds one byte. Address Big Endian Little Endian0x000 0x001 0x002 0x003A direct-mapped cache consists of 8 blocks. A byte-addressable main memory contains 4K blocks of eight bytes each. Access time for the cache is 20 ns and the time required to fill a cache slot from main memory is 300 ns. Assume a request is always started in sequential to cache and then to main memory. If a block is missing from cache, the entire block is brought into the cache and the access is restarted. Initially, the cache is empty. c) Compute the effective access time for this program. Show me how to solve using this equation: EAT = H x AccessC + (1 – H) x AccessMM where H is the cache hit rate and AccessC and AccessMM are the access times for cache and main memory, respectively. thanksShow the content of the individual bytes allocated in memory in hexadecimal for the following declarations. Assuming that the address of I is 404000h, what are the addresses of J, K, and L? What is the total number of allocated bytes?
