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- Design a sequence detector of the pattern 0100 where the circuit accepts a serial bit stream *X" as input and produces a serial bit stream *2° as outputWhenever the bit pattern *0100* appears in the input stream, it outputs 2 = 1: at all other times, 2 = Q Overlapping occurrences of the pattern are also detected,Design a Moore FSM for a Sequence Derector that detects five consecutive bits of "zero" in the input stream of bits, labeled x. The output z equals 1 if, during five consecutive clock cycles, the input x was equal to "zero". Once the sequence is detected, the FSM returns to the initial state S0. Add an asynchronous reset, active low, to the FSM.Implement MATLAB program that plots channel capacity vs signal to noise ratio for 2-PSK,4-PSK,8-PSK modulations
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- A video system can take videos from one of the two video sources, but can only display one source at a provided time. Each source outputs a stream of digitized videos on its 8-bit output. A switch with a single-bit output determines which of the two 8-bit streams will be passed on a display’s single 8-bit input. Implement a circuit that combines the two video sources, the switch, and the display. Use either ONE of the following: a single mux AND/OR an N-bit mux decoder157. The term that refers to the phase continues through the boundary of two signal elements is a. non coherent BFSK b. coherent BFSK c. Binary ASK d. Multilevel ASKCite a reason why it is an important practice to implement a reset signal in a finite state machine?