2. Suppose we have two implementations of the same instruction set architecture. Computer A has a clock cycle time of 250 ps and a CPI of 2.0 for some program and computer B has a clock cycle time of 500 ps and a CPI of 1.2 for the same program. Which computer is faster for this program and by how much?
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2. Suppose we have two implementations of the same instruction set architecture.
Computer A has a clock cycle time of 250 ps and a CPI of 2.0 for some
and computer B has a clock cycle time of 500 ps and a CPI of 1.2 for the same
program. Which computer is faster for this program and by how much?
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- Suppose we have two implementations of the same instruction set architecture. Computer A has a clock cycle time of 200 ps and a CPI of 2 for some program, and computer B has a clock cycle time of 500 ps and a CPI of 1.25 for the same program. Which computer is faster for this program, and by how much?Suppose we have two implementations of the same instruction set architecture. Computer A has a clock cycle time of 210 ps and a CPI of 2.2 for some programs, and computer B has a clock cycle time of 460 ps and a CPI of 1.3 for the same program. Which computer is faster for this program and by how much? Please and thank youSuppose we have two implementations:Machine A has a clock cycle time of 10 ns. and a CPI of 2.0. Machine B has aclock cycle time of 20 ns. and a CPI of 1.2. Which machine is faster for thisprogram, and how much in percentage? Consider that the total instruction in the program is 1x10^9 or about 1,000,000,000 set of instructions since the cycle time is running in nanoseconds.
- Suppose that we have two implementations of the same instruction set architecture. Machine A has a clock cycle time of 50 ns and a CPI of 4.0 for some program, and machine B has a clock cycle of 65 ns and a CPI of 2.5 for the same program. Which machine is faster and by how much?.5. Consider two microprocessors having 8- and 16-bit-wide external data buses, respectively. The two processors are identical otherwise and their bus cycles take just as long. (a) Suppose all instructions and operands are one byte long, by what factor do the maximum data transfer rates differ?Assume that we compile a program with two different compilers for the same ISA, then run the two executables on the same machine M. Version A has a dynamic instruction count of 2.0 x 109 and an execution time of 4 seconds, while version B has a dynamic instruction count of 2.5 x 109 and an execution time of 6 seconds. (a). Find the CPIs for the two executables (Version A and Version B) respectively given that machine M has a frequency of 2GHz (i.e. 2x109 Hz). (b). We further run the two executables on two different processors of the same ISA. Suppose the execution times on the two processors are the same. Using the CPIs from (a), compare the clock of the processor running Version A against the clock of the processor running Version B. Which clock is faster? By how much?
- Consider a machine with three instruction classes and CPI measurements as follows: Instruction class CPI of the instruction class A 2 B 5 C 7 Suppose that we measured the code for a given program in two different compilers and obtained the following data: Code sequence Instruction counts (in millions) A B C 1 15 5 3 2 25 2 2 Assume that the machine’s clock rate is 500 MHz. Which code sequence will execute faster according to MIPS? How much according to execution time of each code sequence?Consider two different implementations, M1 and M2, of the same instruction set. There are three classes of instructions (A, B, and C) in the instruction set. M1 has a clock rate of 2.0GHz and M2 has a clock rate of 2.5GHz. The average number of cycles for each instruction class and their frequencies (for a typical program) are as follow on the table. (a) Calculate the average CPI for each machine, M1, and M2.(b) Calculate the average MIPS ratings for each machine, M1 and M2Consider three different processors P1, P2, and P3 executing the same instruction set. P1 has a 3 GHz clock rate and a CPI of 1.5. P2 has a 2.5 GHz clock rate and a CPI of 1.0. P3 has a 4.0 GHz clock rate and has a CPI of 2.2. Which processor has the highest performance expressed in instructions per second? If the processors each execute a program in 10 seconds, find the number of cycles and the number of instructions.
- Consider two different implementations of the same instruction set architecture. The instructions can be divided into three classes according to their CPI (class A, B, C). P1 with a clock rate of 2.5 GHz and CPIs of 1, 2, and 3, and P2 with a clock rate of 3 GHz and CPIs of 2, 2, 2. Given a program with a dynamic instruction count of 1.0E6 instructions divided into classes as follows: 30% class A, 30% class B, 40% class C, which implementation is faster? What is the global CPI for each implementation? Find the clock cycles required in both cases.Computer A has an overall CPI of 1.3 and can be run at a clock rate of 600MHz.Computer B has a CPI of 2.5 and can be run at a clock rate of 750 Mhz. Wehave a particular program we wish to run. When compiled for computer A, thisprogram has exactly 100,000 instructions. How many instructions would theprogram need to have when compiled for Computer B, in order for the twocomputers to have exactly the same execution time for this program?For example, suppose an instruction is not accepted and VA page 30 is generated. A software-managed TLB can outperform a hardware-managed TLB in the following cases: