4. A benchmark program is run on an 80 MHz processor. Based on the recorded measurements shown below, determine the effective CPI, MIPS rate, and execution time for this program. Instruction Type Instruction Count CPI Integer Arithmetic 30,000 1 Data Transfer 45,000 2 Floating Point 15,000 Control Transfer 10,000 2 Show your work for credit. Effective CPI:

4. A benchmark program is run on an 80 MHz processor. Based on the recorded measurements shown below, determine the effective CPI, MIPS rate, and execution time for this program. Instruction Type Instruction Count CPI Integer Arithmetic 30,000 1 Data Transfer 45,000 2 Floating Point 15,000 Control Transfer 10,000 2 Show your work for credit. Effective CPI:

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 10RQ: How does pipelining improve CPU efficiency? What’s the potential effect on pipelining’s efficiency...

See similar textbooks

Similar questions

If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the fetch cycle is 40% of the processor cycle time, what memory access speed is required to implement load operations with zero wait states and load operations with two wait states?
The table below shows instruction-type breakdown for different programs. Using this data, you will be exploring the performance trade-offs for different changes made to an MIPS processor. Class A Class B Class C Class D Total Program1 90 100 30 10 ? Program2 110 70 20 20 ? Calculate the total instructions required by each of the programs. Assuming that Class A take 1 cycle (CPI) , B and C instructions take 2 cycles, and D take 3 cycles, find the execution time for both the programs on a 3 GHz Processor. What is the speedup if the number of A instruction can be reduced by half and D instructions increased to double? (for both the programs)
Assume that a program requires the execution of 125x106 FP (floating point) instructions, 130x106 INT (integer) instructions, 150x106 L/S (load/store) instructions, and 110x106 branching instructions. These instructions have CPIs of 1, 1, 8 and 4, respectively. Assume that the processor has a 5 GHz clock rate. a. Is it possible to run the program twice as fast if we improve the CPI of just the L/S instructions? If so, by how much? Show your calculations. b. What is the Speedup in the execution time of the entire program if the CPI of INT and FP instructions is reduced by 40% and that of L/S and branching instructions is reduced by 50%?
Assume a program requires the execution of 75 ×106 FP instructions, 112 ×106INT instructions, 88 ×106 L/S instructions, and 12 × 106 branch instructions.The CPI for each type of instruction is 1, 3, 4, and 2, respectively. Assume thatthe processor has a 2 GHz clock rate.a) By how much must we improve the CPI of FP instructions if we wantthe program to run two times faster?b) By how much must we improve the CPI of L/S instructions if we wantthe program to run two times faster?c) By how much is the execution time of the program improved if theCPI of INT and FP instructions is reduced by 40% and the CPI of L/Sand Branch is reduced by 30%?
3. The table below shows instruction-type breakdown for different programs. Using this data, you will be exploring the performance trade-offs for different changes made to an MIPS processor. Compute Load Store Branch Total Program1 600 600 200 50 ? Program2 900 500 100 200 ? a. Assuming that computes take 1 cycle, loads and store instructions take 10 cycles, and branches take 3 cycles, find the execution time for both the programs on a 3 GHz Processor. b. Assuming that computes take 1 cycle, loads and store instructions take 2 cycles, and branches take 3 cycles, what is the speedup if the number of compute instruction can be reduced by one-half?
Consider a HW ISA program P1 with the following Instruction Memory IM: a. fill in the execution table for program P1 using the IM. Use the same notational conventions used in the example execution table for P0 below. Any numbers beginning with 0x will be interpreted as hexidecimal; any numbers not beginning with 0x will be interpreted as decimal. b. Show the final values of the registers R2, R3, and R4 when the program execution halts. Again, any numbers beginning with 0x will be interpreted as hexidecimal; any numbers not beginning with 0x will be interpreted as decimal.
Assume for a given program, 60% of the executed instructionsare of Class A, 10% are of Class B, and 30% are of Class C. Furthermore,assume that an instruction in Class A requires 3 cycles, an instruction inClass B requires 2 cycles, and an instruction in Class C requires 2 tocomplete. i. Compute the overall CPI for this program.ii. Compute the clock rate of the CPU when the time it takes tocomplete 20 instructions is 1.73 ???????????
Your favorite computer program (after being converted to MIPS assembly code, then to machine code) results in 2.5e8 instructions. Consider the three different CPUs and their clock rates and CPIs and determine how much time it would take each of them to execute this program. Rick Sanchez’s computer with a clock rate 7.99 Hz (hertz, not gigahertz) and a CPI of 1.1.
Your favorite computer program (after being converted to MIPS assembly code, then to machine code) results in 2.5e8 instructions. Consider the three different CPUs and their clock rates and CPIs and determine how much time it would take each of them to execute this program. Lawrence’s computer with a clock rate of 3.32 Ghz and a CPI of 1.2.
6. Fill in the requested register values on the right side of the following instruction sequence:mov esi,OFFSET myBytesmov ax,[esi] ; a. AX =mov eax,DWORD PTR myWords ; b. EAX =mov esi,myPointermov ax,[esi+2] ; c. AX =mov ax,[esi+6] ; d. AX =mov ax,[esi-4] ; e. AX =
two different compilers are being tested on the same program for a 3.6GHz machine with three different classes of instructions: Class A,B and C, which require 1, 2 and 3 cycles respectively. the instruction count produced by the first compiler is 4 billion Class A instuctions, 1 billion class B and 4 billion class C instructions. the second compiler produces 8 billion Class A instructions, 2 billion Class B and 3 billion class C instructions. which compiler produces a higher MIPS? which compiler produces a better execution time?
Assume a 3GHz processor executes three classes of instructions(A, B, C).i. Calculate the average CPI for this sequence of program.ii. Calculate the execution time for this sequence of program.iii. If we use a system with four same processors, there will bespeed up by a factor of 4 for classes A and C, but class B willremain unaffected. Calculate the new execution time for thissystem. What is the overall speed up? Class A B C CPI for class 4 2 10 IC in sequence 100 200 300