A two word instruction is stored at memory addresses 200 and 201. The first word of the instruction specifies the operation and the mode. The second word specifies the address part. Assume that the address field has the value 300. Assume that the content of memory address 300 is 400. Further, assume that the content of memory address 400 is 600. The program counter has the value 200 for fetching this instruction. The content of processor register R is 800, and the content of an index register XR is 101. i. According to the given information, determine the operand values when the direct and indirect addressing modes are used. ii. Evaluate the effective address for each of the following addressing modes. Register Indirect Relative Indexed

A two word instruction is stored at memory addresses 200 and 201. The first word of the instruction specifies the operation and the mode. The second word specifies the address part. Assume that the address field has the value 300. Assume that the content of memory address 300 is 400. Further, assume that the content of memory address 400 is 600. The program counter has the value 200 for fetching this instruction. The content of processor register R is 800, and the content of an index register XR is 101. i. According to the given information, determine the operand values when the direct and indirect addressing modes are used. ii. Evaluate the effective address for each of the following addressing modes. Register Indirect Relative Indexed

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...

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