As a maintenance engineer in a semiconductor company, you are given a task to replace the current version of dc-biasing circuit for a faulty tester machine. This dc-biasing circuit used an n-channel JFET as shown in Figure 2. Re-design a new dc-biasing circuit using an n-channel D-MOSFET that can produce a similar output current, IDQ as the previous circuit. Your tasks are: (i) Calculate the operating point (IDQ and VGSQ) of the dc-biasing circuit in Figure 2. Then sketch the JFET network transfer curve (ID and VGS). (ii) Without changing the circuit configuration, calculate the values of source resistor, RS and RB to achieve this objective. Determine the commercial value of the new RS and RB.     For cost reduction reason, the values of RD, RA and VDD should be maintained.     The chosen D-MOSFET has a maximum drain current of 8 mA and gate-source cuto

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As a maintenance engineer in a semiconductor company, you are given a task to replace the current version of dc-biasing circuit for a faulty tester machine. This dc-biasing circuit used an n-channel JFET as shown in Figure 2. Re-design a new dc-biasing circuit using an n-channel D-MOSFET that can produce a similar output current, IDQ as the previous circuit. Your tasks are:


(i) Calculate the operating point (IDQ and VGSQ) of the dc-biasing circuit in Figure 2. Then sketch the JFET network transfer curve (ID and VGS).

(ii) Without changing the circuit configuration, calculate the values of source resistor, RS and RB to achieve this objective. Determine the commercial value of the new RS and RB.
    For cost reduction reason, the values of RD, RA and VDD should be maintained.
    The chosen D-MOSFET has a maximum drain current of 8 mA and gate-source cutoff voltage of – 15V.
    The new RS value should be 3 times larger than the old RS used in the JFET network to compensate for the high VDD value in the proposed circuit.


(iii) Give ONE advantage of your proposed dc-biasing network as compared to the previous version using n-channel JFET in Figure 2?

Vs = 4V
1.8 kN
1 kΩ
16 V o
V GS
Ipss = 4 mA
Vp=-6 V
RA = 3.6 kN
RB = 1.2 kN
Figure 2: DC biasing using JFET
Transcribed Image Text:Vs = 4V 1.8 kN 1 kΩ 16 V o V GS Ipss = 4 mA Vp=-6 V RA = 3.6 kN RB = 1.2 kN Figure 2: DC biasing using JFET
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