(b) Consider a 16-bit processor in which the following appears in main memory, starting at location 200: 200 Load to AC Mode 201 500 202 Next instruction The first part of the first word indicates that this instruction loads a value into an accumulator. The Mode field specifies an addressing mode and, if appropriate, indicates a source register; assume that when used, the source register is R1, which has a value of 400. There is also a base register that contains the value 100. The value of 500 in location 201 may be part of the address calculation. Assume that location 399 contains the value 999, location 400 contains the value 1000, and so on. Determine the effective address and the operand to be loaded for the following address modes, also explain the working in each mode: c. Indirect f. Register a. Direct b. Immediate d. PC relative e. Displacement g. Register indirect |

(b) Consider a 16-bit processor in which the following appears in main memory, starting at location 200: 200 Load to AC Mode 201 500 202 Next instruction The first part of the first word indicates that this instruction loads a value into an accumulator. The Mode field specifies an addressing mode and, if appropriate, indicates a source register; assume that when used, the source register is R1, which has a value of 400. There is also a base register that contains the value 100. The value of 500 in location 201 may be part of the address calculation. Assume that location 399 contains the value 999, location 400 contains the value 1000, and so on. Determine the effective address and the operand to be loaded for the following address modes, also explain the working in each mode: c. Indirect f. Register a. Direct b. Immediate d. PC relative e. Displacement g. Register indirect |

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter11: Operating Systems

Section: Chapter Questions

Problem 30VE

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Similar questions

6. Suppose that the interrupt processing method of is to store the breakpoint in the address of 00000Q unit, and fetch the instruction from the 77777Q unit (that is the first instruction of the interrupt service routine) and execute it. Write the micro-operations sequence that completes this function.
Consider the following store instruction: SW R1, 0x000F(R0). Assume that the registers R0 and R1 are initialized with 0x00000001 and 0x53A78BC Frespectively. A section of the MIPS byte addressable data memory is shown. Give the memory word of the following memory locations after the SW operation: (a). 0x00000015. (b). 0x00000014. (c). 0x00000013. (d) 0x00000012.(e). 0x00000011. (f). 0x00000010.
The following diagram shows some registers like processor registers R1 and R2, Program counter PC and Index Register XR along with their corresponding values. It also shows a memory with some instructions like instruction A and next instruction. The memory holds instruction B which consists of four fields as given above. First field of instruction represents the addressing Mode (I), second field specifies Opcode (operation code) ADD representing operation addition, the third field represents Address field 1 and the fourth field represents Address field 2. Consider the following addressing modes, evaluate the result of execution of above instruction by giving steps of evaluation for each addressing mode for the scenario given above. Ø Immediate Mode Ø Direct Mode Ø Register Ø Relative Mode Ø Index Mode Choose your own values for variables (v – w), T1, T2. Choose any one of the given value for T3 (200 or 300). V=700 W=800 T1=200 T2=200 T3=300
The following diagram shows some registers like processor registers R1 and R2, Program counter PC and Index Register XR along with their corresponding values. It also shows a memory with some instructions like instruction A and next instruction.The memory holds instruction B which consists of four fields as given above. First field of instruction represents the addressing Mode (I), second field specifies Opcode (operation code) ADD representing operation addition, the third field represents Address field 1 and the fourth field represents Address field 2. Consider the following addressing modes, evaluate the result of execution of above instruction by giving steps of evaluation for each addressing mode for the scenario given above. Immediate Mode  Direct Mode Register Relative Mode Index ModeNote: Choose your own values for variables k – w, T1, T2. Choose any one of the given value for T3 (200 or 300).
Suppose we have the instruction Load 0000. Given memory and register R1 contain thevalues below:R130Memory Address Content0000 40...0010 30...0020 78...0030 55...0040 77...0050 84 Assuming R1 is implied in the indexed addressing mode, determine the actual value loaded into the accumulator using the following addressing modes: a. Immediateb. Directc. Indirectd. Indexed
Assume that registers $s0 and $s1 hold the values 0x90000000 and 0xA0000000, respectively. These are integer values. Please take into account that these are 32-bit registers. a) What is the value of $t0 after the following MIPS instruction has been completed? add $t0, $s0, $s1 $s0: 0 x 9 0 0 0 0 0 0 0 $s1: 0 x A 0 0 0 0 0 0 0
1. In this exercise we examine in detail how an instruction is executed in a single cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word: 10001100101001100000000000111000 Assume that the data memory is all zeros and that the processor’s registers have the following values at the beginning of the cycle in which the above instruction word is fetched: R0 R1 R2 R3 R4 R5 R6 R8 R12 R3 1 0 1 -2 4 -6 4 -10 -12 -14 31 a. What are the outputs of the sign-extend and the jump “Shift-Left-2” (near the top of the following Figure) for this instruction word? b. What are the values of ALU control unit’s inputs (ALUOp and Instruction operation) for this instruction? c. For the ALU and the two add units, what are their data input values? ALU Add (PC+4) Add (Branch) Input#1 Input#2 Input#1 Input#2 Input#1 Input#2
Suppose, you as a designer of the CPU decide to add two general-purpose registers named D and E having a two-way connection with the internal bus of the CPU. Drawthe modified CPU diagram with these two registers. need solution for the above question.
Consider a 16-bit processor in which the following appears in the main memory, starting at location 200.a. The first part of the first word (content at 200) indicates that this instruction loads a value into an accumulator; the value of 300 in location 201 may be part of the address calculator. The mode field specifies an addressing mode and, if appropriate, indicates a source register. a. Assume that when used, the source register R1, which has a value of 500. b. There is also a base register that contains the value 100, Assume that location 249 contains the value 399, location 250 contains the value 400, and so on. Determine the effective address and the operand to be loaded for the following address modes:
in 80886 microprocessor Suppose that. DS = 0200H, BX = 0300H, and DI-400H Determine the memory address accessed by each of the following instructions, assuming real mode operation: (1) MOV AL,[1234H] (2) MOV AX,[BX] (3) MOV [DI]AL
6. Assume that two numbers: dividend and divisor are saved in memory address M1 and M2 respectively. Quotient and remainder should be saved in R1 and R2 respectively. Write assembly language instructions and then list microoperations for each instruction and list the control signals required to be activated for each microoperation. MBR is used as buffer for any register to register transfer operation. Signal Description: Control signals operation Comments C0 MAR to RAM (through address bus) C1 PC to MBR C2 PC to MAR C3 MBR to PC C4 MBR to IR C5 RAM to MBR C6 MBR to ALU C7 Accumulator to ALU C8 IR to MAR C9 ALU to Accumulator C10 MBR to Accumulator C11 Accumulator to MBR C12 MBR to RAM (through data bus) C13 IR to Control Unit C14 MBR to R1 C15 MBR to R2 C16 MBR to R3 C17 MBR to R4…
Determine the specific type of addressing mode (SMALL LETTERS only) and compute for the address/es. If applicable, determine the content of the destination after the execution of the instruction. Otherwise, NA. For physical address and content of the destination, use CAPITAL LETTERS,NO SPACE/S in between and NO need to include "H" or the unit. If the given register are fewer than required, just put zeroes in the most significant place. A -effective address B - physical address/es e.g. 19000-19001 C - is for addressing mode type, e.g. direct D - content of the destination after execution e.g. if register: AX=1234 if memory (lower address first): 12000=34;12001=12 EFFECTIVE ADDRES: PHYSICAL ADDRESS/ES: ADDRESSING MODE : CONTENT OF THE DESTINATION: