2- A computer with memory size 128K word with 32 bits each. its instruction format has indirect bit I, REG. part to specify one of 16 registers, an opcode part OPCOD, and address part ADR. The number of bits in REG, OPCOD, and ADR respectively are: O A- 4, 16, and 16 O B- 4, 10, and 16 O C- 4, 16, and 17 D- 4, 10, and 17

2- A computer with memory size 128K word with 32 bits each. its instruction format has indirect bit I, REG. part to specify one of 16 registers, an opcode part OPCOD, and address part ADR. The number of bits in REG, OPCOD, and ADR respectively are: O A- 4, 16, and 16 O B- 4, 10, and 16 O C- 4, 16, and 17 D- 4, 10, and 17

Name: 11:17O %A N2- A computer with memory size128K word with 32 bits each.
Uploaded: 2024-03-20T06:51:23.000Z
Channel: Bartleby
Description: 11:17O %A N2- A computer with memory size128K word with 32 bits each. itsinstruction format has indirectbit I, REG. part to specify one of16 registers, an opcode partOPCOD, and address part ADR.The number of bits in REG,OPCOD, and ADR respectivelyar

C++ for Engineers and Scientists

4th Edition

ISBN:9781133187844

Author:Bronson, Gary J.

Publisher:Bronson, Gary J.

Chapter2: Problem Solving Using C++using

Section2.5: Variables And Declaration Statements

Problem 9E: (Practice) a. Using Figure 2.14 and assuming the variable name rate is assigned to the byte at...

See similar textbooks

Similar questions

(Practice) a. Using Figure 2.14 and assuming the variable name rate is assigned to the byte at memory address 159, determine the addresses corresponding to each variable declared in the following statements. Also, fill in the correct number of bytes with the initialization data included in the declaration statements. (Use letters for the characters, not the computer codes that would actually be stored.) floatrate; charch1=M,ch2=E,ch3=L,ch4=T; doubletaxes; intnum,count=0; b. Repeat Exercise 9a, but substitute the actual byte patterns that a computer using the ASCII code would use to store characters in the variables ch1, ch2, ch3, and ch4. (Hint: Use Appendix B.)
A set of eight data bytes is stored in memory locations starting from XX70H. Write a program to add two bytes at a time and store the sum in the same memory locations, low order sum replacing the first byte and a carry replacing the second byte. If any pair does not generate a carry, the memory location of the second byte should be cleared. Data(H) F9, 38, A7, 56,98,52, 8F, F2
Q1: Suppose the hypothetical processor has two I/O instructions: (3+3+3)0011=Load AC from I/O0111=Store AC to I/OIn this case, the 12-bit address identifies a particular external device. Show the program execution using figure for the following program:a) Load AC from device 6b) Add contents of memory location 880c) Store AC to device 7 (Note: Question is to be solved similar to the pictures attached with minimum explaination of a line or two with the steps and SHOULD include the memory location 880 as stated in the question)
Assume that CS=3500, DS=4500, SS=5500, SI=2200, DI=4200, BX=7300, BP=8000, AX=3420 (all values are in hex). Calculate the physical address of the memory and show the contents in each of the following: a) MOV [BP]+10,AX b) MOV [SI],AX c) MOV [BX][DI]+20,AX
QUESTION ONE (1) 1. The hypothetical machine has two I/O instructions: 0011 = Load AC from I/O 0111 = Store AC to I/O In these cases, the 12-bit address identifies a particular I/O device. List the steps for every execution for the following program and illustrate using table that explain the process below : a. Load AC from device 5. b. Add contents of memory location 940. c. Store AC to device 6. d. Assume that the next value retrieved from device 5 is 3 and that location 940 contains a value of 2.
3 The 8-bit registers R1, R2, R3, and R4 initially have the following values:R1 - 1111 0010, R2- 1 1 1 1 1 1 1 1 , R3- 1011 1001 , R4 1 1 101010Determine the 8-bit values in each register after the execution of the following sequence ofmicrooperations.R1 <-R1 + R2R3<- R3 ^ R4, R2 <- R2 + 1R1 <- R1 – R3
5. When two words are multiplied (one in BX), the most significant word of result will be in _______, and the least significant word will be in __________ (1 Mark) a. BX, CX b. CX, BX c. AX, DX d. DX, AX 6. Compare and contrast SUB and CMP instructions? (1 Mark) 7. Write the contents of AH and BL after execution of the program. (1 Mark) MOV AH,40h SAL AH, 01 MOV BL,80h SAR BL,01 HLT AH= ____________ BL= ____________ 8. Write the contents of AL and BL register after execution of the program (1 Mark) MOV AL, FFh MOV BL, AL CMP AL, F0H SUB BL,10H HLT AL= ____________ BL= ____________ 9. Identify and correct the mistakes. (1 Mark) MOV AX, 32H ____________________ MOV BL, 2424H ____________________ DAS AX, BL ____________________ HLT ____________________ 10. Write an ALP to rotate right the contents of AL register 4 times including carry and save the result in DH register (1 Mark)
A computer is using a fully associative cache and has 216 bytes of main memory (byte addressable) and a cache of 64 blocks, where each block contains 32 bytes. a. How many blocks of main memory are there? b. What will be the sizes of the tag, index, and byte offset fields? c. To which cache set will the memory address 0xF8C9(hexadecimal) map?
D] An integer arithmetic unit that can perform addition and multiplication of 16-bit unsigned numbers is to be used to multiply two 32-bit unsigned numbers. All operands, intermediate results, and final results are held in 16-bit registers labeled R0 through R15. The hardware multiplier multiplies the contents of Ri (multiplicand) by Rj (multiplier) and stores the double-length 32-bit product in registers Rj and Rj+1, with the low-order half in Rj. When j = i − 1, the product overwrites both operands. The hardware adder adds the contents of Ri and Rj and puts the result in Rj. The input carry to an Add operation is 0, and the input carry to an Add-with-carry operation is the contents of a carry flag C. The output carry from the adder is always stored in C. Specify the steps of a procedure for multiplying two 32-bit operands in registers R1, R0, and R3, R2, high-order halves first, leaving the 64-bit product in registers R15, R14, R13, and R12. Any of the registers R11 through R4 may…
Q:Answer the following sentence with (True) or (False) and correct the false answer: 1. You can input data of size 16-bit through the fixed port. 2. In the maximum mode, the status signals S₁, S₂ and S3 are controlled by the bus controller. 3. HLDA is an output signal. 4. In 8086, when executing the instruction MOV AL, [SI+100D H] where SI-100AH, Ao=0 and BHE=1 5. When S, is 0, the TF is disabled.
Convert given code to LEGv8 code:int f, g, y //global 64-bit variablesint sum (int a, int b) { // at memory address X0+1000.return (a +b)} int main (void) // at memory address X0 + 800{f=2;g=3;y= sum (f, g);return y;}Convert this code, making valid assumptions about registers and register use. Notethat brackets and global variable declarations are not affecting the addresses of the instructionsin memory.
[Note: You are allowed to use only instructions implemented by the actual MIPS hardwareprovided in attached photos below. Use assembly language format from the references orthe book. Note, base ten numbers are listed as normal (e.g. 23), binary numbers areprefixed with 0b and hexadecimal numbers are prefixed with 0x.] Write a C program and corresponding assembly program based on MIPS ISA that reads three edges for a triangle and computes the perimeter if the input is valid. Otherwise, display that the input is invalid. The input is valid if the sum of every pair of two edges is greater than the remaining edge. [Direction: You can consult any resources such as books, online references, and videosfor this assignment, however, you have to properly cite and paraphrase your answerswhen it is necessary.] solve it any how urgently please.