Consider a computer with byte-addressable main memory of size 1 GB and page size of 4 KB. Assume a process P has a virtual address space from 0 to 28653 (decimal). Determine the width of the physical address 30 , the width of the frame # field 4 , and the width of the offset field 18 of the physical address. (Note: enter only the numbers e.g. 5 for 5 bits etc.)
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A: Answer: Given Main Memory 256Mbytes Page Size =4Kbytes and logical address=26 bits
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A: Answer to the above question is in step2.
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A: 32 bits= 2^5 256 pages= 2^8
Q: Consider a system with 256Mbytes of main memory with page ize of 4Kbytes. It has a logical address…
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A: ----------------------------------------------- | Tag | Set Number | Block…
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A: CLICK HERE TO GET MORE FREE SOLUTIONS :: Solution :: // C program for the above approach…
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A: Below is the answer to above questions.
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A: 1.
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A: Question :-
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- Suppose a byte-addressable computer using set associative cache has 216 bytes of main memory and a cache of 32 blocks, and each cache block contains 8 bytes. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache?Suppose that a machine has 42-bit virtual addresses and 32-bit physical addresses.{a} How much RAM can the machine support (each byte of RAM must be addressable)?{b} What is the largest virtual address space that can be supported for a process?{c} If pages are 2 KB, how many entries must be in a single-level page table?{d} If pages are 2 KB and we have a two-level page table where the first level is indexed by 15-bits, then how many entries does the first-level page table have?{e} With the same setup as part {d}, how many entries are in each second-level page table?{f} What is the advantage of using a two-level page table over single-level page table?Suppose a byte-addressable computer using set associative cache has 4Mbyes of main memory and a cache of 64 blocks, where each cache block contains 8 bytes. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache? Show all work and explain how you got the answers please. Thanks
- 1. Consider a computer system with a 30-bit logical address and 4-KB page size. The systemsupports up to 512 MB of physical memory. How many entries are there in each of the following?Assume that each page table entry is 4 Bytes.c. A conventional single-level page table?d. An inverted page table?e. A two-level hierarchical page table? 2. Consider a virtual memory system with a 50-bit logical address and a 38-bit physical address.Suppose that the page/frame size is 16K bytes. Assume that each page table entry is 4 Bytes.a. How many frames are in the systems? How many pages in the virtual address space for aprocess?b. If a single-level page table is deployed, calculate the size of the page table for each process.c. Design a multilevel page table structure for this system to ensure that each page table can fitinto one frame. How many levels do you need? Draw a figure to show your page systemsSuppose a byte-addressable computer using set associative cache has 2^24 bytes of main memory and a cache size of 64K bytes, and each cache block contains 32 bytes. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache?Assume a process containing 5 pages with 1024 bytes per page and physical memory with 10 page frames. Frames and pages are of the same size. Given the following page map table (PMT): a) determine the physical address associated with the logical address of page 1, offset 100? b) what is the logical address associated with the physical address 2300? Please dont over complicate this question!!
- Suppose a byte-addressable computer using set-associative cache has 216 bytes of main memory and a cache of 32 blocks, and each cache block contains 8 bytes.Q.) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache; that is, what are the sizes of the tag, set, and offset fields?Consider a memory-management system based on paging. The total size of the physical address space 64 MB, Pages of size 4 KB, the Logical address space of 4GB. total number of pages are 16384, total number of frames are 16384 and the number of entries in a page table are 1048576.Now Calculate: a)Size of Page Table b) No of bits in Physical Address c) No of Bits in Logical AddressSuppose a computer system uses 16-bit addresses for both its virtual and physical addresses. In addition, assume each page (and frame) has size 256 bytes. Could you hand draw the page table, if possible a) Suppose that the OS uses a two-level page table. Draw the page table. (Assume that frames 7 through 221 are free, so you can allocate space for the page table there.) In addition, suppose that the page-table directory storage comprises a whole number of consecutive full frames. (For examples: if the directory entry is 2 bytes, the entry’s storage comprises 1 frame; if the directory entry is 260 bytes, the entry’s storage comprises 2 consecutive frames.) b) What is the size of the two-level page table
- Suppose a byte-addressable computer using set associative cache has 8M byes of main memory and a cache of 128 blocks, where each cache block contains 64 bytes. a) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 16-way set associative, what is the format of a memory address as seen by the cacheConsider a program that performs the following steps repeatedly: Use the CPU for 4 milliseconds. By issuing an I/O, use the disk for 14 milliseconds. Use the CPU for 10 milliseconds. By issuing an I/O, use network for 18 milliseconds. Assume that each step depends on data obtained from the previous step (e.g., step 3 cannot start before step 2 is completed. Also assume that each resource (CPU or disk or network) can be used by one process at a time. Answer the following questions: (a) Draw 3 time-line diagrams (horizontal axis is the time line; one line for each resource. That is, 3 parallel rows in the resulted figure.) that illustrate the utilizations of the CPU, disk, and network over the execution of two iterations of the program above by a single process. (b) What are the average utilizations of the CPU, disk and network over these two iterations? (Please note that the “total time” should be the same across all resources, from the entire system starts until all work on any…Consider a computer system with a 64-bit logical address and 32-KB page size. Thesystem supports up to 4096 MB of physical memory. How many entries are there ineach of the following?a. A conventional single-level page table?b. An inverted page table?