Consider two different implementations, 11 andi2, of the same instruction set. There are threeclasses ofinstructions (A, B, and C) in the instruction set, 11 has a clockrate of 5 GHz, and 12 has a clock rateof 7 GHz. The average numberof cycles for each instruction class on 11 and 12 is given in thefollowing table:ClassCPI on 11CPI on 12C1 UsageC2 UsageC3 UsageA30%25%5%240%25%90%42.30%50%5%The table also contains a summary of average proportion ofinstruction classes generated by three differentcompilers, C1, C2,and C3. Assume that each compiler uses the same number ofinstructions for a givenprogram but that the instruction mix is asdescribed in the table.Using C3, compute the average CPI for each of 1 and 12 Thencompute the speed, that is the averagenumber of instructions persecond for each of 11 and 12. Then decide which one is faster thanthe other? andin what ratio?

Answered: Consider two different implementations,…

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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In the picture attached, the Say that the system is running 3 jobs, A, B, and C, and that all of them are CPU-intensive (i.e., each one does one infinitely long CPU burst). The system begins with A on the CPU at the beginning its time quantum while B and C are in the Ready Queue, in that order. a) Show the execution pattern (as a string of A’s, B’s, C’, and o’s) assuming that the scheduler time quantum is equal to 4 ms. Show the execution for more than 20ms (but less than 30ms). b) In the long run (i.e, assuming jobs don’t ever terminate), what percentage of the CPU time is wasted doing context-switching/scheduling? The answers I came up with is as follows: a) AAAAoBBBoCCCoAAAoBBBoCCCoAAA, because for the first 4ms, A gets to execute it's full time quantum, however, when context-switching to the next job, the switch is included in the time quantum. b) 2.77% spent context switching, divide the number of o's by the total amount of runtime.
Give downvote if plagiarized or from internet A program is run on a system with two types of machine language instructions: type A instructions each require 3 clock cycles, while type B instructions each require 1 clock cycle. If 100 million type A instructions and 400 million type B instructions are executed, what is the CPI for this program? A program is run on a system with two types of machine language instructions: type A instructions each require 3 clock cycles, while type B instructions each require 1 clock cycle. If 100 million type A instructions and 400 million type B instructions are executed, what is the CPI for this program?
You are tasked with the development of an E-Scooter ride-sharesystem. It allows registered commuters to approach an idle E-Scooter andreserve it, following which they use the E-Scooter to commute a certaindistance (that is not known prior to use). Finally, after the commuter reachestheir destination, they end the ride, which prompts an automaticcomputation of the ride fees. which is automatically debited using thecommuters registered payment details.
CODE IN JAVA !!!!!!!!!!!!!!!!!!!!!!!! Provide a full code of: CPU multilevel feedback queue scheduler: for this system, we have 3 levels of feedback queue scheduling: (1) top priority queue: Round-Robin quantum = 8ms; (2) middle priority queue: Round-Robin quantum = 16ms (3) low priority queue: FCFS Provide examples of the code's output at the bottom.
to design a simulator to simulate the behavior of a CPU scheduler, i.e.,choosing a process from the ready queue based on a scheduling algorithm to execute it by theprocessor. The simulator has to be implemented using C++. The simulator will consists of following classes:(i) Process: The data members of this class should store process id, arrival time in the ready queue,CPU burst time, completion time, turn around time, waiting time, and response time. The memberfunctions of this class should assign values to the data members and print them. A constructorshould also be used.(ii) Process_Creator: This class will create an array of processes and assign a random arrival timeand burst time to each process. Data members, constructor and member functions can be writtenaccordingly.(iii) Scheduler: This class will implement the scheduling algorithm. The class will maintain a readyqueue of infinite capacity (i.e., any number of processes can be accommodated in the queue). Theready queue should…
P is a set of processes. R is a set of resources. E is a set of request or assignment edges. The sets P, R, and E are as follows: P = {P1, P2, P3} R = {R1, R2, R3} E = {P1 -> R1, P2 -> R3, P3-> R2, R1 -> P2, R2 -> P2, R2 -> P1, R3 -> P3} R1 has one instance. R2 has two instances. R3 has one instance. a. Explain clearly with the help of a properly labelled diagram what is a resource allocation graph? Draw the resource-allocation graph for the given case also. b. Is there any deadlock in this situation? Explain your answer clearly.
P is a set of processes. R is a set of resources. E is a set of request or assignment edges. The sets P, R,and E are as follows:P = {P1, P2, P3}R = {R1, R2, R3}E = {P1 -> R1, P2 -> R3, P3-> R2, R1 -> P2, R2 -> P2, R2 -> P1, R3 -> P3}R1 has one instance. R2 has two instances. R3 has one instance.a. Explain clearly with the help of a properly labelled diagram what is a resource allocation graph?Draw the resource-allocation graph for the given case also. [2 + 1]b. Is there any deadlock in this situation? Explain your answer clearly.
Suppose that a multiprogrammed system has a load of N processes with individual execution times of t1, t2, ...,tN. Answer the following questions: a) How would it be possible that the time to complete the N processes could be as small as: maximum (t1, t2, ...,tN)? b) How would it be possible that the total execution time, T > t1+ t2+ ...+tN? In other words, what would cause the total execution time to exceed the sum of individual process execution times?
Consider a computer running a program that requires 250 seconds, where 70 seconds is spent executing FP instructions, 55 seconds for INT operations, 85 seconds for load/save operations, and 40 seconds for branch instructions. By how much is the time for INT operations reduced if the total time is reduced by 20%?
Isolation of high-level abstractions from low-level details is our goal here. By carefully managing the dependencies within a system so that all source code dependencies, especially those that cross-architecture boundaries, point towards high-level abstractions, not low-level details we can implement this pattern. (SRP, OCP, LSP, ISP, or DIP) The Single Responsibility Principle (SRP)The Open-Closed Principle (OCP)The Liskov Substitution Principle (LSP)The Interface Segregation Principle (ISP)The Dependency Inversion Principle (DIP)
Now consider the Verilog version of this same simple multicycle implementation: http://aggregate.org/CPE380/multiv.html (Links to an external site.) . Which of the following statements about how that works is false? Group of answer choices The bench module instantiates a processor called PE, and generates the clock input signal to it Symbolic names for things like word size and the implementation of each control signal are given using `define The main memory is a reg array defined in a separate memory module, which is instantiated within the processor module The ALU is specified as using a ripple-carry adder rather than carry lookahead, etc. The control logic is implemented by a case statement that performs the appropriate action(s) for the current STATE
Talk about how this computer's addressable space is determined succinctly using an example.

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