Consider two different instruction sets, Il and 12. Il has 3 classes of instructions, A1, B1 andCl while 12 has 4 classes of instructions A2, B2, C2 and D2. The following table gives theCPI for each class of instructions and their average usage.Instruction set IlClass CPI UsageAlBICi240%335%525%Instruction set 12Class CPI Usage40%A2B235%15%3C24D2510%Machine M1 implements Il with a clock rate of 3.5 GHz and machine M2 implements 12 witha clock rate of 3 GHz. Determine the performance of M1 and M2 expressed in instructionsper second. Which of the two machines executes more instructions per second and how manytimes better is it?

Answered: Consider two different instruction…

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Consider a machine with three instruction classes and CPI measurements as follows: Instruction class CPI of the instruction class A 2 B 5 C 7 Suppose that we measured the code for a given program in two different compilers and obtained the following data: Code sequence Instruction counts (in millions) A B C 1 15 5 3 2 25 2 2 Assume that the machine’s clock rate is 500 MHz. Which code sequence will execute faster according to MIPS? How much according to execution time of each code sequence?
Consider two different implementations, M1 and M2, of the same instruction set. There arethree classes of instructions (A, B, and C) in the instruction set. M1 has a clock rate of 2.0GHz and M2has a clock rate of 2.5GHz. The average number of cycles for each instruction class and their frequencies(for a typical program) are as follows:Instruction Class M1-Cycles/InstructionClass M2 -Cycles/InstructionClasss FrequencyA 1 2 60%B 3 2 30%C 4 3 10%(a) Calculate the average CPI for each machine, M1, and M2.(b) Calculate the average MIPS ratings for each machine, M1 and M2.(c) Which machine has a smaller MIPS rating? Which individual instruction class CPI do you needto change, and by how much, to have this machine have the same or better performance as themachine with the higher MIPS rating (you can only change the CPI for one of the instructionclasses on the slower machine)?
Suppose the implementation of an instruction set architecture uses three classes of instructions, which are called A, B, and C. The total dynamic instruction count is 1 x 10^7 and the processor's clock rate is 2.5 GHz. Details for the three classes are given in the table below: Class CPI % of instructions A 1 20% 50% C 3 30% Complete the following table. Express all answers in scientific notation and round to two decimal places, when needed. Class Instruction Count Number of Clock Cycles х 10^ x 10^ A х 10^ х 10^ x 10^ х 10^ C
Please,Consider two different implementations, M1 and M2, of the same instruction set. There arethree classes of instructions (A, B, and C) in the instruction set. M1 has a clock rate of 2.0GHz and M2has a clock rate of 2.5GHz. The average number of cycles for each instruction class and their frequencies(for a typical program) are as follows:Instruction Class M1-Cycles/InstructionClass M2 -Cycles/InstructionClasss FrequencyA 1 2 60%B 3 2 30%C 4 3 10%(a) Calculate the average CPI for each machine, M1, and M2.(b) Calculate the average MIPS ratings for each machine, M1 and M2.(c) Which machine has a smaller MIPS rating? Which individual instruction class CPI do you needto change, and by how much, to have this machine have the same or better performance as themachine with the higher MIPS rating (you can only change the CPI for one of the instructionclasses on the slower machine)?.
Consider two different implementations, P1 and P2, of the same instruction setarchitecture. There are four classes of instructions (A, B, C, and D).P1 has a clock rate of 1.5 GHz and CPI for each instruction class is as follows:Class CPI for this classA 1B 2C 3D 4P2 has a clock rate of 2.0 GHz and CPI for each instruction class is as follows:Class CPI for this classA 2B 2C 2D 2a. Given a program with 106 instructions divided into classes as follows: 10% classA, 20% class B, 50% class C and 20% class D, which implementation is faster?
Consider two different implementations of the same instruction set architecture.The instructions can be divided into four classes according to their CPI (classA, B, C, and D). P1 with a clock rate of 2.5 GHz and CPIs of 2, 3, 4, and 4, andP2 with a clock rate of 3 GHz and CPIs of 2, 2, 3, and 1. Given a program witha dynamic instruction count of 1.0E6 instructions divided into classes asfollows: 10% class A, 20% class B, 50% class C, and 20% class D, whichimplementation is faster?
Consider two different implementations of the same MIPS instruction set architecture. The instructions can be divided into three classes according to their CPI (R-type, I-type, J-type). P1 with a clock rate of 2.4 GHz and CPIs of 2, 3,and 4; and P2 with a clock rate of 2.8 GHz and CPIs of 3, 3, and 3. Given a program with a dynamic instruction count of 2.0E6 instructions divided into classes as follows: 25% R-type, 35% I-type, 40% J-type, which implementation is faster? What is the global CPI for each implementation? Find the clock cycles required in both cases.
10. Consider the following code: .386 .model flat, stdcall .stack 4096 ExitProcess PROTO, dwExitCode : DWORD .data aVal SDWORD -6 bVal SWORD 19h cVal DWORD 17h .code mov edx, aVal add edx, edx mov eax, 0FFFFFFFFh mov ax, bVal sub edx, eax Show the content of edx and eax after executing each instruction in Hexadecima
One machine uses a 2 GHz clock and executes a program with 4 classes of instructions, A, B, C, D. Their respective cycles/instruction are CPIA=3, CPIB=2, CPIC=4, and CPID=2. Another machine has a faster clock of 3.2 GHz, and a different architecture, such that the same classes of instructions have CPIA=2, CPIB=2, CPIC=3, and CPID=2. Both machines execute a program where the frequency of the four classes of instructions is 30% for Class A, 20% for Class B, 10% for Class C and 40% are instructions of Class D. a. How many instructions did each of the machines execute in 10 seconds (assume no overhead)? b. If a program has 10º instructions, which machines finishes first? c. Which machine is more performant? d. Compare the MIPS of the two machines.
Consider the following instruction sequence where registers R1,R2 and R3 are general purpose and MEMORY[X] denotes the content at the memory location X. InstructionMOV R1,(5000)MOV R2,(R3)ADDR2,R1MOV (R3),R2INC R3DEC R1BNZ 1004HALTSemanticsR1←MEMORY[5000]R2←MEMORY[R3]R2←R1+R2MEMORY[R3]←R2R3←R3+1R1←R1−1Branch if not zero to thegiven absolute addressStopInstruction Size (bytes)44242221 Assume that the content of the memory location 5000 is 10, and the content of the register R3 is 3000. The content of each of the memory locations from 3000 to 3020 is 50. The instruction sequence starts from the memory location 1000. All the numbers are in decimal format. Assume that the memory is byte addressable. After the execution of the program, the content of memory location 3010 is
Consider a multilevel computer in which levels are vertically stacked, with the lowest level being level 1. Each level has instructions that are m times as powerful as those of the level below it; that is, one level r instruction can do the work of m instructions at level r-1. However, n instructions at level r-1 are required to interpret each instruction at level r. Given this, answer the following questions: If a level 1 program requires k seconds to run, how long would the equivalent program take to run at levels 2, 3 and 4. Express your answer in terms of n, m, and r. What is the performance implication for the program if n > m? Conversely, what is the implication if m > n? Which case do you think more likely? Why?
Q2/ Consider three different processors P1, P2, and P3 with the clock rates and CPIs given in the following table. Processor Clock Rate CPI P1 4 2 P2 2.5 1.0 P3 3 1.5 If the processors each execute a program in 10 seconds, find the number of cycles and the number of instructions. Which processor has the highest performance expressed in instructions per second if all processors have the same instructions set architecture? Q/3 Our favorite program runs in 10 seconds on computer A, which has a 400Mhz. clock. We are trying to help a computer designer build a new machine B, that will run this program in 6 seconds. The designer can use new technology to substantially increase the clock rate, but has informed us that this increase will affect the rest of the CPU design, causing machine B to require 1.2 times as many clock cycles as machine A for the same program. What clock rate should we tell the designer to target? Answer: Q 4/ Suppose we have two implementations of the…

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