s required to execute tvo processes (A= 6 KB and B- 3.7 KB) in a computer has RAM of size 12 KB. * I" virtual memory is implemented by using segmentation, draw the segment tables which will be created by the operating system. Consider the following: RAM a. process A has two segments (So= 2.4 KB and S1= 3.6 KB) b. process B has one segment. RAM has two holes: 8KB and 3 KB d. the operating system uses best fit strategy to allocate holes. e. process B be ready before process A. 8 KB Hole с. зкВ Hole 2. If virtual memory is implemented by using paging, draw the page tables which will t created by the operating system. Consider the following: a. page size =2 KB the free frame list is: 0, 1, 3 , 4, 5 c. process B be ready before process A. b.

s required to execute tvo processes (A= 6 KB and B- 3.7 KB) in a computer has RAM of size 12 KB. * I" virtual memory is implemented by using segmentation, draw the segment tables which will be created by the operating system. Consider the following: RAM a. process A has two segments (So= 2.4 KB and S1= 3.6 KB) b. process B has one segment. RAM has two holes: 8KB and 3 KB d. the operating system uses best fit strategy to allocate holes. e. process B be ready before process A. 8 KB Hole с. зкВ Hole 2. If virtual memory is implemented by using paging, draw the page tables which will t created by the operating system. Consider the following: a. page size =2 KB the free frame list is: 0, 1, 3 , 4, 5 c. process B be ready before process A. b.

C++ for Engineers and Scientists

4th Edition

ISBN:9781133187844

Author:Bronson, Gary J.

Publisher:Bronson, Gary J.

Chapter2: Problem Solving Using C++using

Section2.3: Data Types

Problem 9E: (Practice) Although the total number of bytes varies from computer to computer, memory sizes of...

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A computer uses virtual memory, and a new solid-state drive (SSD) as space for paging. Refer to the last ppt file. In the case presented there, the hard disk drive (HDD) required 25 ms to read in a page, and a rate of 1 page fault per 1000 references introduced a 250 slowdown. If the SSD offers a time of only 80 µs, what is the slowdown in performance caused by 1 pf per 1000 references (you are not concerned with dirty vs. clean pages). What is the maximum rate of page faults you can accept if you want no more than a 5% slowdown in execution using virtual memory? Know your metric prefixes and symbols for time: s for seconds, ms for milliseconds, µs for microseconds, ns for nanoseconds.
Let's pretend for a moment that we have a byte-addressable computer with fully associative mapping, 16-bit main memory addresses, and 32 blocks of cache memory. The following holds true if each block is 16 bits in size:a) Determine how many bytes the offset field is.Measure the tag field's width and height in pixels (b).
Now, we consider a 16-byte, four-way, fully-associative cache. Since the capacity of the cache is 16 bytes, the array "a" in our example (does/does not) fit inside the cache. We can deduce that the block size for this cache is ( ？ ) bytes per block. So the block index size b=2 bits. For a memory trace record such as: L 1fff000116,2 the 2-bit block offset is (0b01/0b10/0b11/0b00). The tag bits are all the rest of the bits not part of the block offset.
(Practice) Although the total number of bytes varies from computer to computer, memory sizes of millions and billions of bytes are common. In computer language, the letter M representsthe number 1,048,576, which is 2 raised to the 20th power, and G represents 1,073,741,824, which is 2 raised to the 30th power. Therefore, a memory size of 4 MB is really 4 times 1,048,576 (4,194,304 bytes), and a memory size of 2 GB is really 2 times 1,073,741,824 (2,147,483,648 bytes). Using this information, calculate the actual number of bytes in the following: a. A memory containing 512 MB b. A memory consisting of 512 MB words, where each word consists of 2 bytes c. A memory consisting of 512 MB words, where each word consists of 4 bytes d. A thumb drive that specifies 2 GB e. A disk that specifies 4 GB f. A disk that specifies 8 GB
Q3 Consider a swapping system in which main memory contains the following hole sizes in memory order: 10K, 4K, 20K, 18K, 7K, 9K, 12K, and 15K. Which hole is taken for successive segment requests of (a) 12K, (b) 10K and (c) 9K for Next-Fit? Assume the last allocated hole is 20K.
Answer only 3 and 4 Suppose memory has 256KB, OS use low address 20KB, there is one program sequence: (20) • Prog1 request 80KB, prog2 request 16KB, • Prog3 request 140KB • Prog1 finish, Prog3 finish; • Prog4 request 80KB, Prog5 request 120kb • Use first match and best match to deal with this sequence • (from high address when allocated) • (1)Draw allocation state when prog1,2,3 are loaded into memory? • (2)Draw allocation state when prog1, 3 finish? • (3)use these two algorithms to draw the structure of free queue after prog1 , 3 finish(draw the allocation descriptor information,) • (4) Which algorithm is suitable for this sequence ? Describe the allocation process?
Suppose we have a system with the following properties:The memory is byte addressable.Memory accesses are to 1-byte words (not to 4-byte words).Addresses are 13 bits wide.The cache is 4-way set associative (E = 4), with a 4-byte block size(B = 4) and eight sets (S = 8).Consider the following cache state. All addresses, tags, and valuesare given in hexadecimal format. The Index column contains the set index for each set of four lines. The Tag columns contain the tag value for each line. The V columns contain the valid bit for each line. The Bytes 0−3 columns contain the data for each line, numbered left to right starting with byte 0 on the left. A. What is the size (C) of this cache in bytes?B. The box that follows shows the format of an address (1 bit perbox). Indicate (by labeling the diagram) the fields that would beused to determine the following:CO. The cache block offsetCI. The cache set indexCT. The cache tag
Given memory partitions of 100K, 600K, 400K, 500K, and 300K (inorder), howwould each of the First-fit, Best-fit, and Worst-fitalgorithms place processes of 117K, 412K, 325K, and 510K (inorder)? b)Also define First-fit, Best-fit, and Worst-fitalgorithms. c)Which algorithm makes the most efficient useofmemory?
I ONLY NEED 3 AND 4 Suppose memory has 256KB, OS use low address 20KB, there is one program sequence: Prog1 request 80KB, prog2 request 16KB, Prog3 request 140KB Prog1 finish, Prog3 finish; Prog4 request 80KB, Prog5 request 120kb Use first match and best match to deal with this sequence (from high address when allocated) (1)Draw allocation state when prog1,2,3 are loaded into memory? (2)Draw allocation state when prog1, 3 finish? (3)use these two algorithms to draw the structure of free queue after prog1 , 3 finish (4) Which algorithm is suitable for this sequence ? Describe the allocation process?
Mapping is a process in which data is transformed between main memory and cache memory. Consider a computer with main memory capable of storing 1024 K words, each word in memory is 64 bits. The computer has cache memory capable of storing 2048 words, each word is of size 64 bits. Discuss with suitable diagram how associative mapping method can be used to transform data between main memory and cache memory?
please no chatgpt answer . Consider a demand-paging system with a paging disk that has an average access and transfer time of 20 milliseconds. Addresses are translated through a page table in main memory, with an access time of 1 microsecond per memory access. Thus, each memory reference through the page table takes two accesses. To improve this time, we have added an associative memory that reduces access time to one memory reference, if the page-table entry is in the associative memory. Assume that 80 percent of the accesses are in the associative memory and that, of those remaining, 10 percent (or 2 percent of the total) cause page faults. What is the effective memory access time? Consider the following page reference string: 1, 2, 3, 4, 2, 1, 5, 6, 2, 1, 2, 3, 7, 6, 3, 2, 1, 2, 3, 6. Assuming demand paging with four frames, Show which pages are resident under the LRU, FIFO, and Optimal replacement algorithms by filling out the following tables. How many page faults would occur…
Take into account the following scenario: we have a byte-addressable computer with 2-way set associative mapping, 16-bit main memory addresses, and 32 blocks of cache memory. Since there are 8 bytes in a block, you can use that information to calculate how big the offset field has to be.