Mapping is a process in which data is transformed between main memory and cache memory. Consider a computer with main memory capable of storing 1024 K words, each word in memory is 64 bits. The computer has cache memory capable of storing 2048 words, each word is of size 64 bits. Discuss with suitable diagram how associative mapping method can be used to transform data between main memory and cache memory?

Let's pretend for a moment that we have a byte-addressable computer with fully associative mapping, 16-bit main memory addresses, and 32 blocks of cache memory. The following holds true if each block is 16 bits in size:a) Determine how many bytes the offset field is.Measure the tag field's width and height in pixels (b).

4. The figure below shows an 8-way interleaved, byte-addressable memory. The total size of the memory is 4 KB. The elements A[i]G) of a 2-dimensional array A are 4-bytes (one-word) in length and can be stored in the memory as shown, where 0 < ij <7. The width of the bus between CPU and memory is 32 bits, that is, it can carry only one word at a time. Bank 1 Bank 7 Bank 0 31 7 A[7][0] A[I][0] A[0]|0] 32 A[7]1] 64 A[7]|2] A[I][2] A[0||2] RANKO 255 224 AI기기 A[I][7] A[0||7) RANKN ...... Since the address space of the memory is 4 KB, 12 bits are needed to uniquely identify each memory location, i.e., Addr[11:0]. Find out and explain which bits of the address will be used for: • Byte on bus: Addr […... :...] Bank index bits within a bank: Addr [.... .] • Chip select address bits within a rank: Addr […... .] • Rank bits: Addr […... :....]

Suppose a computer using 8-way set associative cache has 1 M words of main memory, and a cache of 16 K words, where each cache block contains 8 words. What is the format of a memory address as seen by the cache, i.e., what are the sizes of the tag, set, and ?word fields Tag = 9-bit, Set = 8-bit, Word = 3-bit Tag = 9-bit, Set = 7-bit, Word =4-bit Tag = 9-bit, Set = 6-bit, Word = 5-bit Tag = 9-bit, Set = 5-bit, Word = 6-bit