Design a four-resistor bias network for an NMOStransistor to give a Q-point of (250μ A, 4.5 V) withVDD = 9 V and REQ ≅ 250 kΩ. Use the parameters TABLE 4.6MOS Transistor ParametersNMOS DEVICEPMOS DEVICEVro+0.75 V-0.75 V0.75/V0.5/V20F0.6 V0.6 VK'100 μΑ/V240 μΑ/V2

Given ID=250 μAVDD=9 VREQ=250 kΩ Let suppose VGS-VTN=1 V The value of source resistance is given by…

Answered: TABLE 4.6 MOS Transistor Parameters…

Delmar's Standard Textbook Of Electricity

7th Edition

ISBN:9781337900348

Author:Stephen L. Herman

Publisher:Stephen L. Herman

Chapter30: Dc Motors

Section: Chapter Questions

Problem 6RQ: What is CEMF?

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Question

Design a four-resistor bias network for an NMOS
transistor to give a Q-point of (250μ A, 4.5 V) with
V_DD = 9 V and R_EQ ≅ 250 kΩ. Use the parameters

TABLE 4.6
MOS Transistor Parameters
NMOS DEVICE
PMOS DEVICE
Vro
+0.75 V
-0.75 V
0.75/V
0.5/V
20F
0.6 V
0.6 V
K'
100 μΑ/V2
40 μΑ/V2

Expert Solution

Step 1

Given

$\begin{array}{rcl} I_{D} & = & 250 μA \\ V_{D D} & = & 9 V \\ R_{E Q} & = & 250 kΩ \end{array}$

Let suppose $V_{G S} - V_{T N} = 1 V$

The value of source resistance is given by

$\begin{array}{rcl} I_{D} R_{S} & = & V_{D S} \\ R_{S} & = & \frac{V_{D S}}{I_{D}} \\ R_{S} & = & \frac{4.5}{250 \times 10^{- 6}} \\ R_{S} & = & 18 kΩ \end{array}$

Step 2

The expression for drain-source voltage is given by

$\begin{array}{rcl} V_{D S} & = & V_{D D} - I_{D} (R_{S} + R_{D}) \\ 4.5 & = & 9 - (250 \times 10^{- 6}) (18 \times 10^{3} + R_{D}) \\ (250 \times 10^{- 6}) (18 \times 10^{3} + R_{D}) & = & 4.5 \\ 18 \times 10^{3} + R_{D} & = & 18 \times 10^{3} \\ R_{D} & = & 0 Ω \end{array}$

The value of gate-source voltage is,

$V_{G S} - V_{T N} = 1 V_{G S} - 0.75 = 1 V_{G S} = 1.75 V$

Step 3

The width-to-length ratio is given by,

$\begin{array}{rcl} I_{D} & = & \frac{K_{n}^{'}}{2} (\frac{W}{L}) {(V_{G S} - V_{T N})}^{2} \\ 250 \times 10^{- 6} & = & \frac{100 \times 10^{- 6}}{2} (\frac{W}{L}) {(1)}^{2} \\ (\frac{W}{L}) & = & \frac{500}{100} \\ \frac{W}{L} & = & \frac{5}{1} \end{array}$

The Thevenin's gate voltage is given by

$\begin{array}{rcl} V_{E Q} & = & V_{G S} + I_{D} R_{S} \\ = & 1.75 + (250 \times 10^{- 6}) (18 \times 10^{3}) \\ = & 1.75 + 4.5 \\ = & 6.25 V \end{array}$

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TABLE 4.6 MOS Transistor Parameters NMOS DEVICE PMOS DEVICE Vro +0.75 V -0.75 V 0.75/V 0.5/V 20F 0.6 V 0.6 V K' 100 μΑ/V2 40 μΑ/V2