The laptop we are talking is intel i7-8750H, 64 bit . write in detail information about the below contents. Content should be only about intel i7-8750H: specifications about the memory, including: (a) Differences between RAM and ROM, (b) What is cache memory and why is it important, (c) Number and sizes of L1, L2, and L3 (if applicable) caches,

The laptop we are talking is intel i7-8750H, 64 bit . write in detail information about the below contents. Content should be only about intel i7-8750H: specifications about the memory, including: (a) Differences between RAM and ROM, (b) What is cache memory and why is it important, (c) Number and sizes of L1, L2, and L3 (if applicable) caches,

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 4PE

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The laptop in question is an Intel i7-8750H 64-bit. Fill up the blanks with detailed information on the following subjects. Content: memory standards, which include: (a) Distinctions between RAM and ROM, (b) Explain what cache memory is and why it is crucial. (c) The number and size of L1, L2, and L3 caches (if appropriate). (d) Cache type (direct mapping, or associative), (e) Addressing Style (byte, or block), (f) Support for virtual memory (may be dependent on OS type)
Using multiple 4M × 8 RAM chips (see below) plus a decoder, construct theblock diagram of a 16M × 16 RAM system. Hint: 1 million = 2^20. Please answer the following questions.How many 4M × 8 RAM chips are needed?How many address lines does the memory system require?How many data lines does the memory system require? What kind of address decoder is required? Now design the system below. Be sure you label the memory systeminputs, Addr, R/W, and MemSel, and the system’s outputs D0~D15. Also label buswidths, and inputs and outputs of any required decoders. Put a star on the chipscontaining memory location 0.
Computer Organization and ArchitectureAssignment Submit your work by uploading it in Blackboard or bringing it as a hard copy to my office by the deadline. Answer the following question:1-What is the datapath?2-What is the Instruction cycle?3-What is the memory hierarchy? 4-Give small description or example and indicate the format of the following MIPS functions:(The first two of them are examples) Please here is three columns one to instructions and two to format of instruction and three column is to description of function to all instructions but i don't copy to here only Please solve it. FormatFormatDescription lw $1,100($2)Iload word from $2+100 and put it in $1 and $1,$2,$3Gadd $2 and $3 and put the result in $1 | $1= $2+$3 Sw $1,100($2) la $1,label andi $1,$2,100 or $1,$2,100 srl $1,$2,10 li $1,100 move $1,$2 Beq $1,$2,100 Bne $1,$2,100 div $2,$3 Bgt $1,$2,100 addi $1,$2,100 addu $1,$2,$3
As per company guidelines THEY CAN SOLEVE ONLY THREE QUESTION SO I GOT A) B) AND C) NEED D) E) F) G)!!! Suppose that a 64M x 16 main memory is built using 512K × 8 RAM chips and memory is word-addressable. a) How many RAM chips are necessary?b) If we were accessing one full word, how many chips would be involved?c) How many address bits are needed for each RAM chip?d) How many banks will this memory have?e) How many address bits are needed for all of memory?f) If high-order interleaving is used, where would address 32(base 10) be located? (Your answer should be "Bank#, Offset#")g) Repeat (f) for low-order interleaving.
Explain, bearing in mind the issues of trade-off used in design, how come a typical PC or laptop would have 64K L1, 256K L2 and 4M L3 multi-cache system?
At a minimum, how many bits are needed in the MAR with each of the following memory sizes? A memory unit that is said to be 640 KB would actually contain how many memory cells? What about a memory of 512 MB? What about a memory of 2 GB? Explain what use read-only memory (ROM) serves in the design of a computer system. What type of information is kept in ROM, and how does that information originally get into the memory?
Briefly explain how three buses connected to memory modules works to write or read data. Name the different types of memory What are the similarities of virtual memory to cache memory? What’s a memory hole What are the formulas to calculate AMAT, hit rate and miss rate? Using this program segment show how spacial and temporal locality work. Show graphs For (i=0; i<200; i++) { Sum = sum+grades[i] Show the fields of cache, given 256 meg RAM, 256 K Cache, and 32 bytes per block.
From a user’s point of view the two most important characteristics of memory are capacity and _____________. The three performance parameters for memory are: access time, transfer rate, and _________. The ________ rate is the rate at which data can be transferred into or out of a memory unit. The cache consists of blocks called __________. __________ memory consists of peripheral storage devices, such as disk and tape.
a) Dynamic RAM (DRAM) retains data for only a short period (usually 2–4 ms) creatingproblems for the memory system designer. What type of mechanism is required to overcome this problem in DRAMs? b) How the clock generator chip (8284A) is used to provide the clock for the microprocessor? C) What are the three common methods of expanding the interrupt structure of themicroprocessor? Explain any one of them along with example. d) What is the purpose of the de-multiplexed signal on the 8086 microprocessor? e) Determine the number of words (Memory locations) found in each memory device for the given numbers of address connections: 8, 16, and 32
For the 8051 family of microcontrollers:i) Draw a representative memory map and explain how part of the data memory isable to share the same address space as the Special Function Registers in thecase of the 8052. ii) When an 8051 device is switched on, which memory bank is active? Explain howyou can switch to memory bank 1? iii) Explain why you should be very careful if you use a memory bank other thanmemory bank 0 if also using push and pop instructions. How can this issue beavoided?
There are various different forms of digital memory available, including hard disc drives (HDD), random access memory (RAM), solid state drives (SSD), and cache memory. What is the value of having many memory standards, and what would be the benefit to customers if there were just one, such as the varying sizes of SSDs? Is it feasible that adopting a single standard would result in lower costs and more convenience for customers?
The speed of the memory system aff ects the designer’s decision on the size of the cache block. Which of the following cache designer guidelines are generally valid? 1. Th e shorter the memory latency, the smaller the cache block 2. Th e shorter the memory latency, the larger the cache block 3. Th e higher the memory bandwidth, the smaller the cache block 4. Th e higher the memory bandwidth, the larger the cache block