What are the advantages of using a unified cache? • Q3 A two-way set-associative cache consists of 128 lines, or slots, divided into several sets. The main memory contains 8K blocks of 256 words each. Show the format of main memory addresses • Q4 For the hexadecimal main memory addresses 111111, 666666, BBBB88, show the following information, in hexadecimal format: o a Tag, Line, and Word values for a direct-mapped cache, using the format of Figure 4.10 o b. Tag and Word values for an associative cache, using the format of Figure 4.12 o . Tag, Set, and Word values for a two-way set-associative cache, using the format of Figure 4.15 as consider a computer with the following characteristics: total of 1 MB of main memory; word size of 1 byte; block size of 16 bytes; and cache size of 64 kB. o a. For the main memory addresses of FO010, 01234, and CABBE, give the corresponding tag, cache line address, and word offsets for a direct-mapped cache. o b. Give any two main memory addresses with different tags that map to the same cache slot for a direct-mapped cache. • Q6 The hypothetical machine of Figure 3.4 also has two 1/0 instructions: 0011 = Load AC from l/o 0111 = Store AC to 1/o In these cases, the 12-bit address identifies a particular /o device. Show the program execution (using the format of Figure 3.5) for the following program: 1. Load AC from device 5. 2. Add contents of memory location 940. 3. Store AC to device 6. Assume that the next value retrieved from device 5 is 3 and that location 940 contains a value of 2.

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Q2
What are the advantages of using a unified cache?
• 3
A two-way set-associative cache consists of 128 lines, or slots, divided into several sets. The
main memory contains 8K blocks of 256 words each. Show the format of main memory
addresses
• Q4
For the hexadecimal main memory addresses 111111, 666666, BBBBBB, show the following
information, in hexadecimal format:
o a. Tag, Line, and Word values for a direct-mapped cache, using the format of
Figure 4.10
o b. Tag and Word values for an associative cache, using the format of Figure 4.12
O c. Tag, Set, and Word values for a two-way set-associative cache, using the format
of Figure 4.15
Q5
consider a computer with the following characteristics: total of 1 MB of main memory; word
size of 1 byte; block size of 16 bytes; and cache size of 64 kB.
o a. For the main memory addresses of FO010, 01234, and CABBE, give the
corresponding tag, cache line address, and word offsets for a direct-mapped cache.
o b. Give any two main memory addresses with different tags that map to the same
cache slot for a direct-mapped cache.
• Q6
The hypothetical machine of Figure 3.4 also has two 1/0 instructions:
0011 = Load AC from 1/0
0111 = Store AC to 1/o
In these cases, the 12-bit address identifies a particular /o device. Show the
program execution (using the format of Figure 3.5) for the following program:
1. Load AC from device 5.
2. Add contents of memory location 940.
3. Store AC to device 6. Assume that the next value retrieved from device 5 is 3 and
that location 940 contains a value of 2.
Transcribed Image Text:Q2 What are the advantages of using a unified cache? • 3 A two-way set-associative cache consists of 128 lines, or slots, divided into several sets. The main memory contains 8K blocks of 256 words each. Show the format of main memory addresses • Q4 For the hexadecimal main memory addresses 111111, 666666, BBBBBB, show the following information, in hexadecimal format: o a. Tag, Line, and Word values for a direct-mapped cache, using the format of Figure 4.10 o b. Tag and Word values for an associative cache, using the format of Figure 4.12 O c. Tag, Set, and Word values for a two-way set-associative cache, using the format of Figure 4.15 Q5 consider a computer with the following characteristics: total of 1 MB of main memory; word size of 1 byte; block size of 16 bytes; and cache size of 64 kB. o a. For the main memory addresses of FO010, 01234, and CABBE, give the corresponding tag, cache line address, and word offsets for a direct-mapped cache. o b. Give any two main memory addresses with different tags that map to the same cache slot for a direct-mapped cache. • Q6 The hypothetical machine of Figure 3.4 also has two 1/0 instructions: 0011 = Load AC from 1/0 0111 = Store AC to 1/o In these cases, the 12-bit address identifies a particular /o device. Show the program execution (using the format of Figure 3.5) for the following program: 1. Load AC from device 5. 2. Add contents of memory location 940. 3. Store AC to device 6. Assume that the next value retrieved from device 5 is 3 and that location 940 contains a value of 2.
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