Quiz 1 with correct answers

Define Address select logic.

Derive the Boolean logic expression for input x6 of the Encoder that will control the common bus in the Basic Computer. X1 S2 X2 Multiplexer Encoder bus select inputs So X6 X7 X6 = RTO

Each entry in the interrupt vector table stands for a unique set of information.

1- Write the VHDL code for the circuit shown in figure2. The circuit acts as support circuit for the control unit. It takes 5 bit from a 7 bit bus and start counting down at the rising Bus edge of each clock cycle in case the "Decr" signal is active. A new data loaded to the (4.0) n shift count 5-bit down counter CLK Decr circuit each time the "Ld" signal activated. The output "n" is equal to "1" in case the count value reaches "00000". Explain why the control unit Ld n 04.00 n-0 needs such circuit. Do functional simulation for your design. Figure 2

1. Design a 4-bit ALU that performs Arithmetic (add, subtraction), and Logicoperations (AND, OR). The following control signals are to be considered:• A/S: add/subtract (0:add, 1:subtract)• A/O: and/or (0:and, 1:or)• A/L: arithmetic/Logic (0:arithmetic, 1:logic)• R/W: read/write signal (0:read, 1:write)   Unit 3 (A/L) - Design a 4-bit ALU using Unit 1 and Unit 2. The control signal A/L willindicate which operation the ALU will perform (when the control signal is 0 performArithmetic, otherwise if the signal is 1 then perform Logic).Unit 4 (R/W)- Design three 4-bit parallel registers to hold A, B, and C where C keepsthe output of the ALU. The registers have a R/W control signal that indicates that theyare being written to or read from.

1. Design a 4-bit ALU that performs Arithmetic (add, subtraction), and Logicoperations (AND, OR). The following control signals are to be considered:• A/S: add/subtract (0:add, 1:subtract)• A/O: and/or (0:and, 1:or)• A/L: arithmetic/Logic (0:arithmetic, 1:logic)• R/W: read/write signal (0:read, 1:write) The details of each control signal (Unit) are as follows.Unit 1 (A/S) - Design a 4-bit adder/subtractor that accepts two 4-bits numbers, A andB, and either add them up (A + B) or subtract them (A – B) depending on a controlsignal A/S (when the control signal is 0 perform ADD, otherwise if the signal is 1 thenperform SUB). The result will be stored in C.Unit 2 (A/O) - Design a 4-bit AND/OR unit that accepts two 4-bits numbers, A and B,and either AND them or OR them depending on a control signal A/O (when the controlsignal is 0 perform AND, otherwise if the signal is 1 then perform OR – bitwise logicaloperation). The result will be stored in C.Unit 3 (A/L) - Design a 4-bit ALU using Unit…

In the interrupt vector table, each entry represents a different collection of information.

1. Design a SINGLE 4-bit ALU that performs Arithmetic (add, subtraction), and Logicoperations (AND, OR). The following control signals are to be considered:• A/S: add/subtract (0:add, 1:subtract)• A/O: and/or (0:and, 1:or)• A/L: arithmetic/Logic (0:arithmetic, 1:logic)• R/W: read/write signal (0:read, 1:write) The details of each control signal (Unit) are as follows. Unit 1 (A/S) - Design a 4-bit adder/subtractor that accepts two 4-bits numbers, A andB, and either add them up (A + B) or subtract them (A – B) depending on a controlsignal A/S (when the control signal is 0 perform ADD, otherwise if the signal is 1 thenperform SUB). The result will be stored in C. Unit 2 (A/O) - Design a 4-bit AND/OR unit that accepts two 4-bits numbers, A and B,and either AND them or OR them depending on a control signal A/O (when the controlsignal is 0 perform AND, otherwise if the signal is 1 then perform OR – bitwise logicaloperation). The result will be stored in C. Unit 3 (A/L) - Design a 4-bit ALU…

A separate set of information corresponds to each entry in the interrupt vector table.

8086 circuit, assume that the connection of ports A and B is as follows. An information parallel to Port A, or input is provided using the push button. 74LS47 (BCD->display converter) to port B) connected, 7-segment display is placed at the output of the converter. From the A-g inputs of the display characters are created by giving the corresponding led light on the display, whichever is 1. 74LS47 received from Port B binary information provides a conversion to show the correct number on the display(For addresses of ports a and b. By dividing the number consisting of the values (in this order) found in d0, d2, d4 and d6 from the information in Port A by two enter the code showing the result in the range 0-F on the display (if the result is two digits, one digit).

please do all parts

intel 8086 microprocessor

Computer Organization Single Cycle Data Path   Assembly in RISC-V   Draw a picture showing the datapath (with all functional units that are used) for add t2, t1, t0 Explain what is happening in each functional unit

Separate data groups are represented by each individual element of the table that lists the interrupt vectors.

Design a simple ALU. There are 2 inputs, A and B, and each one is stored in 16-bit register and a 3-bit opcode. The output is a 17-bit register Y. The opcode controls ALU functions as follows: Opcode Function 000 001 010 011 100 101 110 111 Operation Y <= A Y <= A + B Y<=A-B Y <= A AND B Y <= A OR B Y <= A + 1 Y<=A-1 Y <= B A Add Subtract AND OR Increment A Decrement A B Write the full VHDL code for your design use your student ID as name of your top-level entity Hint: use multiplexer and simple logic and arithmetic assignments.

Draw the ASMD chart for the following state transition: • If x = 1, control goes from S1 to S2 and then to S3; • If x = 0, control goes from S1 to S3. ] What is the value of registers Ro, R1 and R2 after the RTL operations executed in the (a) (b) following order: • So + 1, S1 + 0, Ro + 0, R1 + 20, R2 + 15 • R2 + R2 + 1, Rq + R1 + Ro If (S, = 1) then (R1 – R2) else if (S, = 1) then (Ro R2) %3D

The interrupt vector table is made up of many entries, each of which has its own independent data structure.

Each entry in the interrupt vector table corresponds to a different set of information.

Operation performed Result = Control сodes 1 00 0 01 1 01 1 10 A or B А - В A + B Α xor B A and B 111 9. Draw on the right the internal architecture of a one-bit ALU with the following function table:

write assembly code for C=A-B for this accumulator architecture machine