Lab0 Manual (1)

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School

Arizona State University *

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Course

120

Subject

Electrical Engineering

Date

Feb 20, 2024

Type

docx

Pages

4

Uploaded by PrivateClover24044

EEE 120 Lab 0 Answer Sheet (Online Class) Tutorial: Using Digital Name:______________Anjana Shyam_______________________________________________________________ Semester/Year/Session (A/B):_________A______________ Date:____1/9/2024_______________________ Task 0-1: Build a 2-input XOR gate using AND/OR/NOT gates in Digital Include a picture of your Digital circuit here: Please comment on the single biggest issue you were facing when designing the circuit. Deleting the wires was one of the biggest issues I faced when designing the circuit, because I had to undo many of the wires I inputted previously, in order to delete the incorrect wire, which ended up being a lot more time consuming than previously expected. Task 0-2: Simulate the design in visually in Digital Include a picture of your simulated circuit here (only one picture with any combination of inputs you choose):
Try several input combinations from the truth table. Do you get the expected output when feeding these inputs? (Y/N) If one of the inputs is light green(1), than the output is (1). However if both of the inputs are light green or dark green than the corresponding output is (0). When one of the inputs is light green, one of the AND gates will output a 1 which will then output a 1 when being fed through the OR gate. Task 0-3: Export the design and simulate in Verilog Include a picture of your GTKWave simulation (timing diagram) here:
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