Lab Report_EET130-1

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School

ECPI University, Virginia Beach *

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Course

201707E

Subject

Electrical Engineering

Date

Feb 20, 2024

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docx

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10

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EET130 Digital Systems I Instructor: Todd Lemon Lab 1 Signals and Number Systems Student Name(s): Carly Hribar Honor Pledge: I pledge to support the Honor System of ECPI. I will refrain from any form of academic dishonesty or deception, such as cheating or plagiarism. I am aware that as a member of the academic community, it is my responsibility to turn in all suspected violators of the honor code. I understand that any failure on my part to support the Honor System will be turned over to a Judicial Review Board for determination. I will report to the Judicial Review Board hearing if summoned. Carly Hribar Date: 11/18/2023 Adding your name here constitutes your agreement to the Honor Pledge as stated.
Contents Abstract ....................................................................................................................................................... 3 Introduction ................................................................................................................................................. 3 Part 1: Methods and Procedures .................................................................................................................. 4 Part 1: Results and Figures ...................................................................................................................... 4 Part 2: Methods and Procedures .................................................................................................................. 4 Part 2: Results and Figures ...................................................................................................................... 4 Conclusion ................................................................................................................................................... 5 References ................................................................................................................................................... 6 2
Abstract In this lab I will verify truth tables for common Logic Gates by constructing circuits in Multisim. I ntroduction This lab will demonstrate the properties of basic logic gates. It will also illustrate some of applications of Universal gates to implement functioning of other logic gates. I will construct common logic gates using Multisim and record the data to check the validity of the truth tables. 3
Part 1: Methods and Procedures- Circuit 1: Circuit 1 1 – OR gate 2 – 1 KOhm resistors 2 – SPDT switches 1 – Digital probe 2 - VCC (5V) 2 – GND For circuit one I constructed a NOT gate circuit using the parts list above. Then used Multisim to test the validity of the predicted truth table. In Multisim I will change inputs A and B using SPDT switches and observe output using digital probe connected to output. Part 1: Results and Figures Table 1 Circuit 1 Results Input A Input B Predicted Output Measured Output 0 0 0 0 1 1 1 0 1 4
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