EE306Fall2018FinalBlank

.pdf

School

University of Texas *

*We aren’t endorsed by this school

Course

306

Subject

Electrical Engineering

Date

Jan 9, 2024

Type

pdf

Pages

Uploaded by MateCloverWolverine31

Nina K. Telang 1 EE306 Introduction to Computing Fall 2018 Final Exam Dr. Nina Telang (TAs: Vignesh Radhakrishnan, Jefferson Lint, Dylan McCoy, Suhas Raja) UT EID: __________________ Printed Name: ______________________ Your signature is your pledge that you have not and will not cheat on this exam, nor help other students to cheat on this exam. Signature: ______________________ Instructions: 1. This is a 180 minute closed book, closed notes exam. 2. No calculators or other electronic devices are allowed. 3. Please refer to the LC-3 ISA sheet, data path, state graph and other reference sheets which have been attached to the exam. 4. Please answer all questions neatly in the space provided. WRITE YOUR FINAL ANSWER IN THE SPACE PROVIDED FOR EACH QUESTION. ONLY THE FINAL ANSWER WILL BE GRADED. NO PARTIAL CREDIT WILL BE GIVEN. 1. Problem # 1 ____________/20 2. Problem # 2 ____________/15 3. Problem # 3 ____________/10 4. Problem # 4 ____________/10 5. Problem # 5 ____________/10 6. Problem # 6 ____________/15 7. Problem # 7 ____________ /10 8. Problem # 8 ____________ /10

Nina K. Telang 2 1. [20 points] Answer the following short questions in the space provided. (i) [2 points] Consider the LC-3 load instruction, LD. During which stages of the instruction cycle of this instruction are MAR and MDR updated. (ii) [2 points] The INT signal for the keyboard is generated using bits 14 and 15 of the KBSR. Say that A = KBSR[15], and B = KBSR[14]. How would you generate the INT signal given only NOT and OR gates? Write the logic expression. (iii) [4 points] Design a 4-to-16 decoder using two 3-to-8 decoders, one NOT gate, and AND gates (any number that you need). (iv) [2 points] Write an LC-3 code snippet that performs the logical OR operation of the contents in R1 and R2, and puts the result in R3.

Nina K. Telang 3 (v) [4 points] Shown below are the contents of registers before and after the LC-3 instruction at location x3210 is executed. Identify the instruction stored at x3210. Write the instruction in hexadecimal . Answers in any other format will not be considered. Before After R0 xFF1D xFF1D R1 x301C x301C R2 x2F11 x2F11 R3 x5321 x5321 R4 x331F x331F R5 x1F22 x1F22 R6 x01FF x01FF R7 x341F x3211 PC x3210 x3220 N 0 0 Z 1 1 P 0 0 (vi) [6 points] A gated D-latch is shown in the figure below. Answer the following short questions: (a) What is the output A if inputs D and WE are both 1? (b) What is the output A if D=0 and WE=1? (c) List the values of S, R that can never occur given this D-latch? Why will these values never occur? A

Nina K. Telang 4 2. [15 points] Data is stored at LC-3 memory location x3456 in floating point format such that there is 1-bit for the sign, 5-bits for the exponent, and 10-bits for the fraction. A student wants to write a program that will output the data in decimal format (i.e. the screen will display a real number like 17.75 or -0.5). For this question, give all numerical responses in decimal. (i) What are the smallest and largest exponents that can be represented using the given format? Note that “exponents” refers to the power of 2. (ii) Shown below is a code sn ippet of the student’s code. After the execution of these lines of code, R5 should contain the exponent of the normalized binary representation of the number stored in x3456 (e.g. if m[x3456] = 1.11*2 4 , then R5 will contain 4). A description of the subroutine BitShift is given in the comments of the program. ; begin code snippet ; R0 contains bits 14-10 of m[x3456] isolated in place AND R0, R0, R0 AND R1, R1, R1 ; BitShift bit shifts the value in R0 a certain direction ; it shifts the bits the number of times specified by the value in R1 JSR BitShift LD R4, VAL ADD R5, R0, R4 ; end code snippet (a) What direction should BitShift shift the bits of R0 (right or left)? (b) What value should R1 contain before BitShift is called for the program to work as intended? (c) What value should R4 be loaded with in order for R5 to contain the correct value after this program’s execution?

Nina K. Telang 5 (d) In the BitShift subroutine, the student’s code performed the following steps: Step 1 : Saved the values of R0 through R7 in memory Step 2 : Checked to see if R1=0 Step 3 : If not, then divided the number in R0 by 2, decremented R1, and looped back to Step 2. Step 4 : If R1 = 0, then restored the values in R0 through R7, followed by RET. If R0 = 16 and R1 = 2 before the execution of the subroutine, what will the values of R0 and R1 be after the execution? Does this subroutine work as intended?

Nina K. Telang 6 3. [10 points] Dr. Telang has decided to have you all implement another LC-3 instruction that will have the opcode 1101 (currently not used). This instruction will be called BIC and will clear a specified bit of a register. The format is as follows: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 1 0 1 DR SR x x x x x x (i) The least significant 6 bits are marked with an “x.” Some of these bits are going to be reserved for the Selection field, which will identify which bit to clear in the SR and stored in the destination register DR. For example, if the Selection field = 12, then bit 12 of the SR will be cleared. What is the minimum number of bits marked wi th an “x” that need to be reserved for this field? (ii) How many memory accesses does this new instruction make? Include all stages of the instruction cycle. (iii) Is it possible for this instruction to change the condition code bits? If so, give an example. (iv) During the Fetch Operands phase, a temporary register, called TR, is loaded with the value that corresponds to the Selection field (e.g. Selection field = 3, TR = x0008). What logical structure can easily produce the value of TR? (v) Write the microinstructions that take place in the Execute and Store Result phase of the instruction cycle. You are allowed to use the following registers: PC, IR, MAR, MDR, SR, DR, and TR.

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version